Search

Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4979014 [patent_doc_number] => 20070220249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'DATA STRUCTURE AND METHOD FOR MANAGING MODULES ASSOCIATED WITH A KERNEL' [patent_app_type] => utility [patent_app_number] => 11/605102 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5223 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220249.pdf [firstpage_image] =>[orig_patent_app_number] => 11605102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/605102
Data structure and method for managing modules associated with a kernel Nov 27, 2006 Issued
Array ( [id] => 146665 [patent_doc_number] => 07689855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Clock supplying apparatus and control method thereof' [patent_app_type] => utility [patent_app_number] => 11/559115 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11373 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/689/07689855.pdf [firstpage_image] =>[orig_patent_app_number] => 11559115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559115
Clock supplying apparatus and control method thereof Nov 12, 2006 Issued
Array ( [id] => 4973108 [patent_doc_number] => 20070113111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Standby Mode for Power Management' [patent_app_type] => utility [patent_app_number] => 11/559388 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6952 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20070113111.pdf [firstpage_image] =>[orig_patent_app_number] => 11559388 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559388
Standby mode for power management Nov 12, 2006 Issued
Array ( [id] => 157886 [patent_doc_number] => 07685446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Dynamic voltage scaling method of CPU using workload estimator and computer readable medium storing the method' [patent_app_type] => utility [patent_app_number] => 11/559117 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3339 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/685/07685446.pdf [firstpage_image] =>[orig_patent_app_number] => 11559117 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559117
Dynamic voltage scaling method of CPU using workload estimator and computer readable medium storing the method Nov 12, 2006 Issued
Array ( [id] => 7598104 [patent_doc_number] => 07584349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-01 [patent_title] => 'Method and system for receiving a software image from a customer for installation into a computer system' [patent_app_type] => utility [patent_app_number] => 11/559007 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5718 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/584/07584349.pdf [firstpage_image] =>[orig_patent_app_number] => 11559007 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559007
Method and system for receiving a software image from a customer for installation into a computer system Nov 12, 2006 Issued
Array ( [id] => 5238325 [patent_doc_number] => 20070130482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Idle Mode for Power Management' [patent_app_type] => utility [patent_app_number] => 11/559387 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7907 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20070130482.pdf [firstpage_image] =>[orig_patent_app_number] => 11559387 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559387
Idle Mode for Power Management Nov 12, 2006 Abandoned
Array ( [id] => 4540208 [patent_doc_number] => 07953997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Power amplifier' [patent_app_type] => utility [patent_app_number] => 11/558585 [patent_app_country] => US [patent_app_date] => 2006-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2648 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/953/07953997.pdf [firstpage_image] =>[orig_patent_app_number] => 11558585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/558585
Power amplifier Nov 9, 2006 Issued
Array ( [id] => 5081388 [patent_doc_number] => 20070124612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'METHOD AND SYSTEM FOR CONTROLLING A MIXED ARRAY OF POINT-OF-LOAD REGULATORS THROUGH A BUS TRANSLATOR' [patent_app_type] => utility [patent_app_number] => 11/558848 [patent_app_country] => US [patent_app_date] => 2006-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6827 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20070124612.pdf [firstpage_image] =>[orig_patent_app_number] => 11558848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/558848
Method and system for controlling a mixed array of point-of-load regulators through a bus translator Nov 9, 2006 Issued
Array ( [id] => 4969816 [patent_doc_number] => 20070109818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'SWITCHING MODE POWER SUPPLY' [patent_app_type] => utility [patent_app_number] => 11/558428 [patent_app_country] => US [patent_app_date] => 2006-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1217 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20070109818.pdf [firstpage_image] =>[orig_patent_app_number] => 11558428 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/558428
Switching mode power supply Nov 8, 2006 Issued
Array ( [id] => 4577095 [patent_doc_number] => 07823001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Latency adjustment between integrated circuit chips' [patent_app_type] => utility [patent_app_number] => 11/553532 [patent_app_country] => US [patent_app_date] => 2006-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 45 [patent_no_of_words] => 10635 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/823/07823001.pdf [firstpage_image] =>[orig_patent_app_number] => 11553532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/553532
Latency adjustment between integrated circuit chips Oct 26, 2006 Issued
Array ( [id] => 423711 [patent_doc_number] => 07275167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-25 [patent_title] => 'Task-oriented processing as an auxiliary to primary computing environments' [patent_app_type] => utility [patent_app_number] => 11/546033 [patent_app_country] => US [patent_app_date] => 2006-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4849 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/275/07275167.pdf [firstpage_image] =>[orig_patent_app_number] => 11546033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/546033
Task-oriented processing as an auxiliary to primary computing environments Oct 9, 2006 Issued
Array ( [id] => 5052884 [patent_doc_number] => 20070033429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Instantaneously restartable clocks and their use such as in connecting clocked subsystems using clockless sequencing networks' [patent_app_type] => utility [patent_app_number] => 11/526376 [patent_app_country] => US [patent_app_date] => 2006-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8392 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033429.pdf [firstpage_image] =>[orig_patent_app_number] => 11526376 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/526376
Design of instantaneously restartable clocks and their use such as in connecting clocked subsystems using clockless sequencing networks Sep 23, 2006 Issued
Array ( [id] => 7726334 [patent_doc_number] => 08099614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Power management for buses in cmos circuits' [patent_app_type] => utility [patent_app_number] => 12/066113 [patent_app_country] => US [patent_app_date] => 2006-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4249 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/099/08099614.pdf [firstpage_image] =>[orig_patent_app_number] => 12066113 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/066113
Power management for buses in cmos circuits Sep 10, 2006 Issued
Array ( [id] => 146823 [patent_doc_number] => 07694162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Conserving power by reducing voltage supplied to an instruction-processing portion of a processor' [patent_app_type] => utility [patent_app_number] => 11/515315 [patent_app_country] => US [patent_app_date] => 2006-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2486 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/694/07694162.pdf [firstpage_image] =>[orig_patent_app_number] => 11515315 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/515315
Conserving power by reducing voltage supplied to an instruction-processing portion of a processor Aug 31, 2006 Issued
Array ( [id] => 4636955 [patent_doc_number] => 08015419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Method and apparatus for soft start power gating with automatic voltage level detection' [patent_app_type] => utility [patent_app_number] => 11/469153 [patent_app_country] => US [patent_app_date] => 2006-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8507 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/015/08015419.pdf [firstpage_image] =>[orig_patent_app_number] => 11469153 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/469153
Method and apparatus for soft start power gating with automatic voltage level detection Aug 30, 2006 Issued
Array ( [id] => 213368 [patent_doc_number] => 07624287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Adaptive power state management' [patent_app_type] => utility [patent_app_number] => 11/468630 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4393 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624287.pdf [firstpage_image] =>[orig_patent_app_number] => 11468630 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468630
Adaptive power state management Aug 29, 2006 Issued
Array ( [id] => 4774158 [patent_doc_number] => 20080059820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Method of reducing power consumption of a computing system by evacuating selective platform memory components thereof' [patent_app_type] => utility [patent_app_number] => 11/511605 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20080059820.pdf [firstpage_image] =>[orig_patent_app_number] => 11511605 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511605
Method of reducing power consumption of a computing system by evacuating selective platform memory components thereof Aug 28, 2006 Issued
Array ( [id] => 462355 [patent_doc_number] => 07246226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-17 [patent_title] => 'Method and apparatus rendering user accounts portable' [patent_app_type] => utility [patent_app_number] => 11/512848 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5343 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/246/07246226.pdf [firstpage_image] =>[orig_patent_app_number] => 11512848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/512848
Method and apparatus rendering user accounts portable Aug 28, 2006 Issued
Array ( [id] => 7593694 [patent_doc_number] => 07627773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Logic circuit and semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/509606 [patent_app_country] => US [patent_app_date] => 2006-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 7056 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/627/07627773.pdf [firstpage_image] =>[orig_patent_app_number] => 11509606 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509606
Logic circuit and semiconductor integrated circuit Aug 24, 2006 Issued
Array ( [id] => 137261 [patent_doc_number] => 07698580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Inline power policing' [patent_app_type] => utility [patent_app_number] => 11/509947 [patent_app_country] => US [patent_app_date] => 2006-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5116 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/698/07698580.pdf [firstpage_image] =>[orig_patent_app_number] => 11509947 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/509947
Inline power policing Aug 24, 2006 Issued
Menu