Search

Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 226848 [patent_doc_number] => 07607005 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-10-20 [patent_title] => 'Virtual hardware system with universal ports using FPGA' [patent_app_type] => utility [patent_app_number] => 11/317221 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/607/07607005.pdf [firstpage_image] =>[orig_patent_app_number] => 11317221 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317221
Virtual hardware system with universal ports using FPGA Dec 21, 2005 Issued
Array ( [id] => 5809450 [patent_doc_number] => 20060095806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Method and apparatus for enabling a low power mode for a processor' [patent_app_type] => utility [patent_app_number] => 11/300716 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3355 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20060095806.pdf [firstpage_image] =>[orig_patent_app_number] => 11300716 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300716
Method and apparatus for enabling a low power mode for a processor Dec 12, 2005 Issued
Array ( [id] => 5137527 [patent_doc_number] => 20070079156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Computer apparatus, storage apparatus, system management apparatus, and hard disk unit power supply controlling method' [patent_app_type] => utility [patent_app_number] => 11/295577 [patent_app_country] => US [patent_app_date] => 2005-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20070079156.pdf [firstpage_image] =>[orig_patent_app_number] => 11295577 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295577
Computer apparatus, storage apparatus, system management apparatus, and hard disk unit power supply controlling method Dec 6, 2005 Issued
Array ( [id] => 5238328 [patent_doc_number] => 20070130485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Component reliability budgeting system' [patent_app_type] => utility [patent_app_number] => 11/295400 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3679 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20070130485.pdf [firstpage_image] =>[orig_patent_app_number] => 11295400 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295400
Component reliability budgeting system Dec 5, 2005 Issued
Array ( [id] => 5238323 [patent_doc_number] => 20070130480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'System and method for enabling fast power-on times when using a large operating system to control an instrumentation system' [patent_app_type] => utility [patent_app_number] => 11/294981 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20070130480.pdf [firstpage_image] =>[orig_patent_app_number] => 11294981 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/294981
System and method for enabling fast power-on times when using a large operating system to control an instrumentation system Dec 5, 2005 Abandoned
Array ( [id] => 813288 [patent_doc_number] => 07418586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Method and apparatus for assigning devices to a partition' [patent_app_type] => utility [patent_app_number] => 11/294839 [patent_app_country] => US [patent_app_date] => 2005-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4037 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/418/07418586.pdf [firstpage_image] =>[orig_patent_app_number] => 11294839 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/294839
Method and apparatus for assigning devices to a partition Dec 4, 2005 Issued
Array ( [id] => 832560 [patent_doc_number] => 07401214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-15 [patent_title] => 'Method for executing computer function options with intelligent memory for computer-based multimedia system' [patent_app_type] => utility [patent_app_number] => 11/293232 [patent_app_country] => US [patent_app_date] => 2005-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2248 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/401/07401214.pdf [firstpage_image] =>[orig_patent_app_number] => 11293232 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/293232
Method for executing computer function options with intelligent memory for computer-based multimedia system Dec 4, 2005 Issued
Array ( [id] => 5184499 [patent_doc_number] => 20070055853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Method for changing booting configuration and computer system capable of booting OS' [patent_app_type] => utility [patent_app_number] => 11/269702 [patent_app_country] => US [patent_app_date] => 2005-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 8417 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20070055853.pdf [firstpage_image] =>[orig_patent_app_number] => 11269702 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/269702
Method for changing booting configuration and computer system capable of booting OS Nov 8, 2005 Issued
Array ( [id] => 5803546 [patent_doc_number] => 20060036886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Circuit for enabling dual mode safe power-on sequencing' [patent_app_type] => utility [patent_app_number] => 11/261151 [patent_app_country] => US [patent_app_date] => 2005-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1896 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20060036886.pdf [firstpage_image] =>[orig_patent_app_number] => 11261151 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/261151
Circuit for enabling dual mode safe power-on sequencing Oct 26, 2005 Issued
Array ( [id] => 5339210 [patent_doc_number] => 20090055674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'Method and device for a switchover and for a data comparison in a computer system having at least two processing units' [patent_app_type] => utility [patent_app_number] => 11/665727 [patent_app_country] => US [patent_app_date] => 2005-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11239 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055674.pdf [firstpage_image] =>[orig_patent_app_number] => 11665727 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/665727
Method and device for a switchover and for a data comparison in a computer system having at least two processing units Oct 24, 2005 Issued
Array ( [id] => 5232450 [patent_doc_number] => 20070294559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Method and Device for Delaying Access to Data and/or Instructions of a Multiprocessor System' [patent_app_type] => utility [patent_app_number] => 11/666328 [patent_app_country] => US [patent_app_date] => 2005-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5942 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294559.pdf [firstpage_image] =>[orig_patent_app_number] => 11666328 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/666328
Method and Device for Delaying Access to Data and/or Instructions of a Multiprocessor System Oct 24, 2005 Abandoned
Array ( [id] => 4592843 [patent_doc_number] => 07853819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Method and device for clock changeover in a multi-processor system' [patent_app_type] => utility [patent_app_number] => 11/666405 [patent_app_country] => US [patent_app_date] => 2005-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5661 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853819.pdf [firstpage_image] =>[orig_patent_app_number] => 11666405 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/666405
Method and device for clock changeover in a multi-processor system Oct 24, 2005 Issued
Array ( [id] => 5411850 [patent_doc_number] => 20090125749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'Method and device for controlling a computer system' [patent_app_type] => utility [patent_app_number] => 11/666412 [patent_app_country] => US [patent_app_date] => 2005-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3127 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20090125749.pdf [firstpage_image] =>[orig_patent_app_number] => 11666412 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/666412
Method and device for controlling a computer system Oct 24, 2005 Abandoned
Array ( [id] => 4600711 [patent_doc_number] => 07984315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-19 [patent_title] => 'External storage device and power management method for the same' [patent_app_type] => utility [patent_app_number] => 11/665856 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6432 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/984/07984315.pdf [firstpage_image] =>[orig_patent_app_number] => 11665856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/665856
External storage device and power management method for the same Oct 23, 2005 Issued
Array ( [id] => 5042207 [patent_doc_number] => 20070094489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Embedded system that boots from USB flash drive' [patent_app_type] => utility [patent_app_number] => 11/256315 [patent_app_country] => US [patent_app_date] => 2005-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6405 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20070094489.pdf [firstpage_image] =>[orig_patent_app_number] => 11256315 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/256315
Embedded system that boots from USB flash drive Oct 20, 2005 Abandoned
Array ( [id] => 4911375 [patent_doc_number] => 20080022142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Multiprocessor System, Synchronization Control Apparatus and Synchronization Control Method' [patent_app_type] => utility [patent_app_number] => 11/664518 [patent_app_country] => US [patent_app_date] => 2005-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8989 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20080022142.pdf [firstpage_image] =>[orig_patent_app_number] => 11664518 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/664518
Multiprocessor System, Synchronization Control Apparatus and Synchronization Control Method Oct 20, 2005 Abandoned
Array ( [id] => 316970 [patent_doc_number] => 07526659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Systems and methods for controlling use of power in a computer system' [patent_app_type] => utility [patent_app_number] => 11/250596 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 18128 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/526/07526659.pdf [firstpage_image] =>[orig_patent_app_number] => 11250596 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/250596
Systems and methods for controlling use of power in a computer system Oct 13, 2005 Issued
Array ( [id] => 799053 [patent_doc_number] => 07428647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-23 [patent_title] => 'System and method for managing information handling system display response time' [patent_app_type] => utility [patent_app_number] => 11/250202 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2727 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/428/07428647.pdf [firstpage_image] =>[orig_patent_app_number] => 11250202 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/250202
System and method for managing information handling system display response time Oct 13, 2005 Issued
Array ( [id] => 4984381 [patent_doc_number] => 20070088940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Initialization of flash storage via an embedded controller' [patent_app_type] => utility [patent_app_number] => 11/250094 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7452 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20070088940.pdf [firstpage_image] =>[orig_patent_app_number] => 11250094 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/250094
Initialization of flash storage via an embedded controller Oct 12, 2005 Issued
Array ( [id] => 5816565 [patent_doc_number] => 20060085656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Voltage ID conversion system for programmable power supplies' [patent_app_type] => utility [patent_app_number] => 11/248987 [patent_app_country] => US [patent_app_date] => 2005-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4082 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20060085656.pdf [firstpage_image] =>[orig_patent_app_number] => 11248987 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/248987
Voltage ID conversion system for programmable power supplies Oct 11, 2005 Abandoned
Menu