Search

Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 992773 [patent_doc_number] => 06920574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Conserving power by reducing voltage supplied to an instruction-processing portion of a processor' [patent_app_type] => utility [patent_app_number] => 10/135116 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2380 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/920/06920574.pdf [firstpage_image] =>[orig_patent_app_number] => 10135116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135116
Conserving power by reducing voltage supplied to an instruction-processing portion of a processor Apr 28, 2002 Issued
Array ( [id] => 950112 [patent_doc_number] => 06963970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-08 [patent_title] => 'System and method for executing a fast reset of a computer system' [patent_app_type] => utility [patent_app_number] => 10/136580 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6023 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/963/06963970.pdf [firstpage_image] =>[orig_patent_app_number] => 10136580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136580
System and method for executing a fast reset of a computer system Apr 28, 2002 Issued
Array ( [id] => 6665382 [patent_doc_number] => 20030204709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Method and /or apparatus for reliably booting a computer system' [patent_app_type] => new [patent_app_number] => 10/136017 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2838 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20030204709.pdf [firstpage_image] =>[orig_patent_app_number] => 10136017 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136017
Method and/or apparatus for reliably booting a computer system Apr 28, 2002 Issued
Array ( [id] => 6430496 [patent_doc_number] => 20020175725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Method for initializing or configuring an electrical circuit' [patent_app_type] => new [patent_app_number] => 10/134127 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2944 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20020175725.pdf [firstpage_image] =>[orig_patent_app_number] => 10134127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/134127
Method for initializing or configuring an electrical circuit Apr 28, 2002 Issued
Array ( [id] => 451156 [patent_doc_number] => 07254701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Method and device for safeguarding a digital process device' [patent_app_type] => utility [patent_app_number] => 10/097743 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2083 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254701.pdf [firstpage_image] =>[orig_patent_app_number] => 10097743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097743
Method and device for safeguarding a digital process device Mar 14, 2002 Issued
Array ( [id] => 6181409 [patent_doc_number] => 20020157001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Computer system capable of switching operating system' [patent_app_type] => new [patent_app_number] => 10/095462 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20020157001.pdf [firstpage_image] =>[orig_patent_app_number] => 10095462 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/095462
Computer system capable of switching operating system Mar 12, 2002 Abandoned
Array ( [id] => 609575 [patent_doc_number] => 07155618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Low power system and method for a data processing system' [patent_app_type] => utility [patent_app_number] => 10/094053 [patent_app_country] => US [patent_app_date] => 2002-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 12252 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/155/07155618.pdf [firstpage_image] =>[orig_patent_app_number] => 10094053 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/094053
Low power system and method for a data processing system Mar 7, 2002 Issued
Array ( [id] => 6452415 [patent_doc_number] => 20020129292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Clock control method and information processing device employing the clock control method' [patent_app_type] => new [patent_app_number] => 10/093543 [patent_app_country] => US [patent_app_date] => 2002-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11474 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20020129292.pdf [firstpage_image] =>[orig_patent_app_number] => 10093543 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/093543
Clock control method and information processing device employing the clock control method Mar 7, 2002 Issued
Array ( [id] => 794313 [patent_doc_number] => 06983363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-03 [patent_title] => 'Reset facility for redundant processor using a fiber channel loop' [patent_app_type] => utility [patent_app_number] => 10/091647 [patent_app_country] => US [patent_app_date] => 2002-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5453 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/983/06983363.pdf [firstpage_image] =>[orig_patent_app_number] => 10091647 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/091647
Reset facility for redundant processor using a fiber channel loop Mar 4, 2002 Issued
Array ( [id] => 6656407 [patent_doc_number] => 20030009705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Monitoring and synchronization of power use of computers in a network' [patent_app_type] => new [patent_app_number] => 10/081728 [patent_app_country] => US [patent_app_date] => 2002-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11762 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009705.pdf [firstpage_image] =>[orig_patent_app_number] => 10081728 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/081728
Monitoring and synchronization of power use of computers in a network Feb 20, 2002 Abandoned
Array ( [id] => 6843454 [patent_doc_number] => 20030148801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Signalling protocol for signalling start of reset processing in serial ATA bus protocol' [patent_app_type] => new [patent_app_number] => 10/061883 [patent_app_country] => US [patent_app_date] => 2002-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5690 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148801.pdf [firstpage_image] =>[orig_patent_app_number] => 10061883 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/061883
Signalling protocol for signalling start of reset processing in serial ATA bus protocol Jan 31, 2002 Abandoned
Array ( [id] => 6763062 [patent_doc_number] => 20030126424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method and apparatus for booting a microprocessor' [patent_app_type] => new [patent_app_number] => 10/026707 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2896 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126424.pdf [firstpage_image] =>[orig_patent_app_number] => 10026707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/026707
Method and apparatus for booting a microprocessor Dec 26, 2001 Issued
Array ( [id] => 5909164 [patent_doc_number] => 20020143410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method of controlling a microcomputer after power shutdown' [patent_app_type] => new [patent_app_number] => 10/025553 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2987 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20020143410.pdf [firstpage_image] =>[orig_patent_app_number] => 10025553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025553
Method of controlling a microcomputer after power shutdown Dec 25, 2001 Abandoned
Array ( [id] => 947734 [patent_doc_number] => 06966005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Energy caching for a computer' [patent_app_type] => utility [patent_app_number] => 10/027125 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3911 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/966/06966005.pdf [firstpage_image] =>[orig_patent_app_number] => 10027125 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027125
Energy caching for a computer Dec 25, 2001 Issued
Array ( [id] => 685512 [patent_doc_number] => 07082542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Power management using processor throttling emulation' [patent_app_type] => utility [patent_app_number] => 10/027392 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3696 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082542.pdf [firstpage_image] =>[orig_patent_app_number] => 10027392 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027392
Power management using processor throttling emulation Dec 20, 2001 Issued
Array ( [id] => 7608099 [patent_doc_number] => 07000101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'System and method for updating BIOS for a multiple-node computer system' [patent_app_type] => utility [patent_app_number] => 10/027833 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4072 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/000/07000101.pdf [firstpage_image] =>[orig_patent_app_number] => 10027833 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027833
System and method for updating BIOS for a multiple-node computer system Dec 20, 2001 Issued
Array ( [id] => 6685097 [patent_doc_number] => 20030120961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Managing multiple processor performance states' [patent_app_type] => new [patent_app_number] => 10/027652 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5297 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120961.pdf [firstpage_image] =>[orig_patent_app_number] => 10027652 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027652
Managing multiple processor performance states Dec 20, 2001 Issued
Array ( [id] => 749506 [patent_doc_number] => 07032116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Thermal management for computer systems running legacy or thermal management operating systems' [patent_app_type] => utility [patent_app_number] => 10/027396 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4537 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/032/07032116.pdf [firstpage_image] =>[orig_patent_app_number] => 10027396 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027396
Thermal management for computer systems running legacy or thermal management operating systems Dec 20, 2001 Issued
Array ( [id] => 6685098 [patent_doc_number] => 20030120962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Method and apparatus for enabling a low power mode for a processor' [patent_app_type] => new [patent_app_number] => 10/027939 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3333 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120962.pdf [firstpage_image] =>[orig_patent_app_number] => 10027939 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/027939
Method and apparatus for enabling a low power mode for a processor Dec 19, 2001 Issued
Array ( [id] => 6670513 [patent_doc_number] => 20030115498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Operating method for detecting and solving underflow and overflow by using oversampling' [patent_app_type] => new [patent_app_number] => 10/025636 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2968 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115498.pdf [firstpage_image] =>[orig_patent_app_number] => 10025636 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025636
Operating method for detecting and solving underflow and overflow by using oversampling Dec 18, 2001 Issued
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