Kannan Shanmugasundaram

Array ( [id] => 17853585 [patent_doc_number] => 20220283627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => PORTABLE COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/669334 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18606422 [patent_doc_number] => 11747886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Response mechanisms of a power sourcing equipment to a swap event of a power supply unit [patent_app_type] => utility [patent_app_number] => 17/591376 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17736436 [patent_doc_number] => 20220221895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => CIRCUIT AND METHOD TO SET DELAY BETWEEN TWO PERIODIC SIGNALS WITH UNKNOWN PHASE RELATIONSHIP [patent_app_type] => utility [patent_app_number] => 17/587882 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587882 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17884584 [patent_doc_number] => 20220300061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SHALLOW HIBERNATE POWER STATE [patent_app_type] => utility [patent_app_number] => 17/648394 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18203884 [patent_doc_number] => 11586274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Managing server performance and reliability during reductions in a number of power supply units [patent_app_type] => utility [patent_app_number] => 17/576719 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 14158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576719 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17564909 [patent_doc_number] => 20220129058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/573194 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18486653 [patent_doc_number] => 20230213998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => PREDICTION-BASED SYSTEM AND METHOD FOR OPTIMIZING ENERGY CONSUMPTION IN COMPUTING SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/568667 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18454407 [patent_doc_number] => 20230195687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SYSTEM SETTING ADJUSTMENT BASED ON LOCATION [patent_app_type] => utility [patent_app_number] => 17/557416 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18454403 [patent_doc_number] => 20230195683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => FINE-GRAINED BITCOIN ENGINE DEACTIVATION FOR YIELD RECOVERY, PERFORMANCE, AND/OR POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/558564 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17658981 [patent_doc_number] => 20220179446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Heterogeneous Computing Systems and Methods for Clock Synchronization [patent_app_type] => utility [patent_app_number] => 17/457637 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18407378 [patent_doc_number] => 20230168730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => REDUCING POWER CONSUMPTION BY PREVENTING MEMORY IMAGE DESTAGING TO A NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/536483 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18989519 [patent_doc_number] => 20240061488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Energy-Saving Method for a Locking System [patent_app_type] => utility [patent_app_number] => 18/269841 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18269841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18989519 [patent_doc_number] => 20240061488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Energy-Saving Method for a Locking System [patent_app_type] => utility [patent_app_number] => 18/269841 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18269841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18393178 [patent_doc_number] => 20230161398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => DATA STORAGE SYSTEM WITH POWER CONSUMPTION EFFICIENCY AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/455921 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18052822 [patent_doc_number] => 11526204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Power management and transitioning cores within a multicore system from idle mode to operational mode over a period of time [patent_app_type] => utility [patent_app_number] => 17/508845 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4238 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508845 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18819297 [patent_doc_number] => 20230393637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => HILITE: HIERARCHICAL AND LIGHTWEIGHT IMITATION LEARNING FOR POWER MANAGEMENT OF EMBEDDED SOCS [patent_app_type] => utility [patent_app_number] => 18/249876 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18249876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17884582 [patent_doc_number] => 20220300059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => INTERNET OF THINGS DEVICE AND BATTERY POWER DETECTION METHOD [patent_app_type] => utility [patent_app_number] => 17/504530 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18826481 [patent_doc_number] => 11841757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-12 [patent_title] => Method and apparatus for cycle-by-cycle clock gating of ferroelectric or paraelectric logic and CMOS based logic [patent_app_type] => utility [patent_app_number] => 17/499241 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 61 [patent_no_of_words] => 31621 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18286525 [patent_doc_number] => 20230101997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SYSTEMS AND METHODS FOR STABLE AND ELEVATED IDLE-MODE TEMPERATURE FOR ASSEMBLED SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/490290 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17345513 [patent_doc_number] => 20220011844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => METHODS AND APPARATUS FOR ADAPTIVE POWER PROFILING IN A BASEBAND PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/485174 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485174 [rel_patent_id] =>[rel_patent_doc_number] =>)