Search

Karen E. Eldridge Powers

Examiner (ID: 12082, Phone: (571)272-4293 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2913
Total Applications
2920
Issued Applications
2880
Pending Applications
1
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8139723 [patent_doc_number] => 20120094407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING LIGHT-EMITTING EFFICIENCY AND HEAT-DISSIPATING EFFECT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/328083 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4487 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094407.pdf [firstpage_image] =>[orig_patent_app_number] => 13328083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/328083
WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING LIGHT-EMITTING EFFICIENCY AND HEAT-DISSIPATING EFFECT AND METHOD FOR MANUFACTURING THE SAME Dec 15, 2011 Abandoned
Array ( [id] => 8164270 [patent_doc_number] => 08173495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Semiconductor on insulator' [patent_app_type] => utility [patent_app_number] => 12/911649 [patent_app_country] => US [patent_app_date] => 2010-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4147 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/173/08173495.pdf [firstpage_image] =>[orig_patent_app_number] => 12911649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/911649
Semiconductor on insulator Oct 24, 2010 Issued
Array ( [id] => 5948309 [patent_doc_number] => 20110031533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/909300 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 7911 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031533.pdf [firstpage_image] =>[orig_patent_app_number] => 12909300 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909300
Semiconductor device Oct 20, 2010 Issued
Array ( [id] => 6602470 [patent_doc_number] => 20100309708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/856850 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 12508 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20100309708.pdf [firstpage_image] =>[orig_patent_app_number] => 12856850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856850
Semiconductor memory Aug 15, 2010 Issued
Array ( [id] => 5993135 [patent_doc_number] => 20110014788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Display panel structure and manufacture method thereof' [patent_app_type] => utility [patent_app_number] => 12/855837 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6231 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20110014788.pdf [firstpage_image] =>[orig_patent_app_number] => 12855837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855837
Display panel structure and manufacture method thereof Aug 12, 2010 Issued
Array ( [id] => 6384219 [patent_doc_number] => 20100302740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Methods of cooling semiconductor dies' [patent_app_type] => utility [patent_app_number] => 12/855562 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6118 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302740.pdf [firstpage_image] =>[orig_patent_app_number] => 12855562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855562
Methods of cooling semiconductor dies Aug 11, 2010 Issued
Array ( [id] => 6145236 [patent_doc_number] => 20110017972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'LIGHT EMITTING STRUCTURE WITH INTEGRAL REVERSE VOLTAGE PROTECTION' [patent_app_type] => utility [patent_app_number] => 12/841257 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2859 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20110017972.pdf [firstpage_image] =>[orig_patent_app_number] => 12841257 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841257
LIGHT EMITTING STRUCTURE WITH INTEGRAL REVERSE VOLTAGE PROTECTION Jul 21, 2010 Abandoned
Array ( [id] => 6508122 [patent_doc_number] => 20100216258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'METHOD FOR MEASURING DOPANT CONCENTRATION DURING PLASMA ION IMPLANTATION' [patent_app_type] => utility [patent_app_number] => 12/777085 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20100216258.pdf [firstpage_image] =>[orig_patent_app_number] => 12777085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777085
Method for measuring dopant concentration during plasma ion implantation May 9, 2010 Issued
Array ( [id] => 6311246 [patent_doc_number] => 20100193895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'DEPLETABLE CATHODE LOW CHARGE STORAGE DIODE' [patent_app_type] => utility [patent_app_number] => 12/754923 [patent_app_country] => US [patent_app_date] => 2010-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193895.pdf [firstpage_image] =>[orig_patent_app_number] => 12754923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/754923
Depletable cathode low charge storage diode Apr 5, 2010 Issued
Array ( [id] => 4551817 [patent_doc_number] => 07856804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'MEMS process and device' [patent_app_type] => utility [patent_app_number] => 12/719999 [patent_app_country] => US [patent_app_date] => 2010-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 10280 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/856/07856804.pdf [firstpage_image] =>[orig_patent_app_number] => 12719999 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719999
MEMS process and device Mar 8, 2010 Issued
Array ( [id] => 4619657 [patent_doc_number] => 07999378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-16 [patent_title] => 'Semiconductor devices including semiconductor dice in laterally offset stacked arrangement' [patent_app_type] => utility [patent_app_number] => 12/710115 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 32 [patent_no_of_words] => 6511 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/999/07999378.pdf [firstpage_image] =>[orig_patent_app_number] => 12710115 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/710115
Semiconductor devices including semiconductor dice in laterally offset stacked arrangement Feb 21, 2010 Issued
Array ( [id] => 4477000 [patent_doc_number] => 07906414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Single-shot semiconductor processing system and method having various irradiation patterns' [patent_app_type] => utility [patent_app_number] => 12/708307 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5430 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906414.pdf [firstpage_image] =>[orig_patent_app_number] => 12708307 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/708307
Single-shot semiconductor processing system and method having various irradiation patterns Feb 17, 2010 Issued
Array ( [id] => 6479161 [patent_doc_number] => 20100213609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SOLDER BUMP, SEMICONDUCTOR CHIP, METHOD OF MANUFACTURING THE SEMICONDUCTOR CHIP, CONDUCTIVE CONNECTION STRUCTURE, AND METHOD OF MANUFACTURING THE CONDUCTIVE CONNECTION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/707872 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5238 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213609.pdf [firstpage_image] =>[orig_patent_app_number] => 12707872 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707872
Solder bump, semiconductor chip, method of manufacturing the semiconductor chip, conductive connection structure, and method of manufacturing the conductive connection structure Feb 17, 2010 Issued
Array ( [id] => 6494567 [patent_doc_number] => 20100200934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'FIELD EFFECT DEVICE INCLUDNG RECESSED AND ALIGNED GERMANIUM CONTAINING CHANNEL' [patent_app_type] => utility [patent_app_number] => 12/702682 [patent_app_country] => US [patent_app_date] => 2010-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3848 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200934.pdf [firstpage_image] =>[orig_patent_app_number] => 12702682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/702682
Field effect device including recessed and aligned germanium containing channel Feb 8, 2010 Issued
Array ( [id] => 8115661 [patent_doc_number] => 08159050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Single crystal silicon structures' [patent_app_type] => utility [patent_app_number] => 12/687619 [patent_app_country] => US [patent_app_date] => 2010-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 58 [patent_no_of_words] => 8370 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159050.pdf [firstpage_image] =>[orig_patent_app_number] => 12687619 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/687619
Single crystal silicon structures Jan 13, 2010 Issued
Array ( [id] => 6358878 [patent_doc_number] => 20100078793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'SEMICONDUCTOR DEVICE ASSEMBLIES, ELECTRONIC DEVICES INCLUDING THE SAME AND ASSEMBLY METHODS' [patent_app_type] => utility [patent_app_number] => 12/631296 [patent_app_country] => US [patent_app_date] => 2009-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6519 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078793.pdf [firstpage_image] =>[orig_patent_app_number] => 12631296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/631296
Semiconductor device assemblies, electronic devices including the same and assembly methods Dec 3, 2009 Issued
Array ( [id] => 4640036 [patent_doc_number] => 08018063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Solder joint reliability in microelectronic packaging' [patent_app_type] => utility [patent_app_number] => 12/610211 [patent_app_country] => US [patent_app_date] => 2009-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018063.pdf [firstpage_image] =>[orig_patent_app_number] => 12610211 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/610211
Solder joint reliability in microelectronic packaging Oct 29, 2009 Issued
Array ( [id] => 4543004 [patent_doc_number] => 07875932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Semiconductor on insulator apparatus' [patent_app_type] => utility [patent_app_number] => 12/581794 [patent_app_country] => US [patent_app_date] => 2009-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4111 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/875/07875932.pdf [firstpage_image] =>[orig_patent_app_number] => 12581794 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/581794
Semiconductor on insulator apparatus Oct 18, 2009 Issued
Array ( [id] => 8028075 [patent_doc_number] => 08143121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'DRAM cell with double-gate fin-FET, DRAM cell array and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/571443 [patent_app_country] => US [patent_app_date] => 2009-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 4349 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143121.pdf [firstpage_image] =>[orig_patent_app_number] => 12571443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/571443
DRAM cell with double-gate fin-FET, DRAM cell array and fabrication method thereof Sep 30, 2009 Issued
Array ( [id] => 6375306 [patent_doc_number] => 20100081269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING ELECTRODE FOR EXTERNAL CONNECTION' [patent_app_type] => utility [patent_app_number] => 12/570459 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6515 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20100081269.pdf [firstpage_image] =>[orig_patent_app_number] => 12570459 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/570459
Method for manufacturing semiconductor device having electrode for external connection Sep 29, 2009 Issued
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