
Karen M. Kusumakar
Examiner (ID: 5215, Phone: (571)270-3520 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 4177, 2829 |
| Total Applications | 1418 |
| Issued Applications | 1226 |
| Pending Applications | 81 |
| Abandoned Applications | 127 |
Applications
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|---|---|---|---|
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