Search

Kathleen Duda

Examiner (ID: 2177, Phone: (571)272-1383 , Office: P/1722 )

Most Active Art Unit
1756
Art Unit(s)
1795, 1506, 1507, 1752, 1737, 1113, 3724, 1756, 1722
Total Applications
1610
Issued Applications
1210
Pending Applications
45
Abandoned Applications
356

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20382481 [patent_doc_number] => 20250364974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => METHOD FOR OPERATING A SWITCHING ELEMENT CONNECTED IN PARALLEL WITH A RECTIFIER ELEMENT AND ELECTRONIC CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/205295 [patent_app_country] => US [patent_app_date] => 2025-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19205295 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/205295
METHOD FOR OPERATING A SWITCHING ELEMENT CONNECTED IN PARALLEL WITH A RECTIFIER ELEMENT AND ELECTRONIC CIRCUIT May 11, 2025 Pending
Array ( [id] => 20096890 [patent_doc_number] => 20250226826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => QUBIT STATE PREPARATION USING QUANTUM STEERING [patent_app_type] => utility [patent_app_number] => 18/953458 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953458 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/953458
QUBIT STATE PREPARATION USING QUANTUM STEERING Nov 19, 2024 Pending
Array ( [id] => 20298408 [patent_doc_number] => 20250323651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/931778 [patent_app_country] => US [patent_app_date] => 2024-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18931778 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/931778
SEMICONDUCTOR DEVICE Oct 29, 2024 Pending
Array ( [id] => 19994543 [patent_doc_number] => 20250132765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => PULSE WIDTH MODULATION CIRCUIT TO GENERATE A FEEDBACK CLOCK [patent_app_type] => utility [patent_app_number] => 18/923751 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923751 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/923751
PULSE WIDTH MODULATION CIRCUIT TO GENERATE A FEEDBACK CLOCK Oct 22, 2024 Pending
Array ( [id] => 20154006 [patent_doc_number] => 20250253844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => METHOD OF FORMING AND OPERATING A SOLID-STATE RELAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/923326 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/923326
METHOD OF FORMING AND OPERATING A SOLID-STATE RELAY DEVICE Oct 21, 2024 Pending
Array ( [id] => 19867001 [patent_doc_number] => 20250105787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => HARMONIC MIXER WITH MULTI-PHASE LOCAL OSCILLATOR SIGNALS FOR INHERENTLY LINEAR UPCONVERSION [patent_app_type] => utility [patent_app_number] => 18/918437 [patent_app_country] => US [patent_app_date] => 2024-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18918437 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/918437
HARMONIC MIXER WITH MULTI-PHASE LOCAL OSCILLATOR SIGNALS FOR INHERENTLY LINEAR UPCONVERSION Oct 16, 2024 Pending
Array ( [id] => 20298393 [patent_doc_number] => 20250323636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => METHODS AND APPARATUS TO MULTIPLEX DIFFERENTIAL SIGNALS BETWEEN MULTIPLE PORTS [patent_app_type] => utility [patent_app_number] => 18/901315 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901315 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/901315
METHODS AND APPARATUS TO MULTIPLEX DIFFERENTIAL SIGNALS BETWEEN MULTIPLE PORTS Sep 29, 2024 Pending
Array ( [id] => 20003228 [patent_doc_number] => 20250141450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => LEVEL SHIFTER [patent_app_type] => utility [patent_app_number] => 18/892767 [patent_app_country] => US [patent_app_date] => 2024-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18892767 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/892767
LEVEL SHIFTER Sep 22, 2024 Pending
Array ( [id] => 19774030 [patent_doc_number] => 20250055456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => Gate Drive Apparatus and Control Method [patent_app_type] => utility [patent_app_number] => 18/886604 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/886604
Gate drive apparatus and control method Sep 15, 2024 Issued
Array ( [id] => 19688969 [patent_doc_number] => 20250007514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => Gate Drive Apparatus and Control Method [patent_app_type] => utility [patent_app_number] => 18/886585 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886585 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/886585
Gate Drive Apparatus and Control Method Sep 15, 2024 Pending
Array ( [id] => 20382492 [patent_doc_number] => 20250364985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => OUTPUT BUFFER THAT CAN PREVENT DRAIN-SOURCE VOLTAGE OF TRANSISTOR FROM BRIEFLY EXCEEDING NOMINAL VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/827840 [patent_app_country] => US [patent_app_date] => 2024-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18827840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/827840
OUTPUT BUFFER THAT CAN PREVENT DRAIN-SOURCE VOLTAGE OF TRANSISTOR FROM BRIEFLY EXCEEDING NOMINAL VOLTAGE Sep 7, 2024 Pending
Array ( [id] => 19644252 [patent_doc_number] => 20240418772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => MONITORING CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND VEHICLE [patent_app_type] => utility [patent_app_number] => 18/820651 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18820651 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/820651
MONITORING CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND VEHICLE Aug 29, 2024 Pending
Array ( [id] => 19804844 [patent_doc_number] => 20250070769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => VOLTAGE SELECTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/809399 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809399
VOLTAGE SELECTOR DEVICE Aug 19, 2024 Pending
Array ( [id] => 19821917 [patent_doc_number] => 20250080124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELLS AND METHOD OF CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 18/809865 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809865 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809865
PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELLS AND METHOD OF CONTROLLING THE SAME Aug 19, 2024 Pending
Array ( [id] => 19635373 [patent_doc_number] => 20240413822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => MULTICHANNEL DRIVER CIRCUITRY AND OPERATION [patent_app_type] => utility [patent_app_number] => 18/810168 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810168 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/810168
MULTICHANNEL DRIVER CIRCUITRY AND OPERATION Aug 19, 2024 Pending
Array ( [id] => 19750177 [patent_doc_number] => 20250038742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => PWM CIRCUIT, APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/785646 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785646 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785646
PWM CIRCUIT, APPARATUS INCLUDING THE SAME Jul 25, 2024 Abandoned
Array ( [id] => 20506943 [patent_doc_number] => 12541218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Circuit with SOI transistors for providing a CTAT current [patent_app_type] => utility [patent_app_number] => 18/785532 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785532
CIRCUIT WITH SOI TRANSISTORS FOR PROVIDING A CTAT CURRENT Jul 25, 2024 Issued
Array ( [id] => 19987579 [patent_doc_number] => 20250125801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => SUPERCONDUCTING QUANTUM CIRCUIT APPARATUS AND CONTROL METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/783742 [patent_app_country] => US [patent_app_date] => 2024-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18783742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/783742
SUPERCONDUCTING QUANTUM CIRCUIT APPARATUS AND CONTROL METHOD THEREFOR Jul 24, 2024 Pending
Array ( [id] => 19574181 [patent_doc_number] => 20240378473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 18/781756 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/781756
REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ERROR CORRECTION Jul 22, 2024 Issued
Array ( [id] => 19941577 [patent_doc_number] => 12313703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Low-voltage fuse read circuit [patent_app_type] => utility [patent_app_number] => 18/763780 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763780
Low-voltage fuse read circuit Jul 2, 2024 Issued
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