
Kaushikkumar A. Desai
Examiner (ID: 8462, Phone: (571)270-7290 , Office: P/3788 )
| Most Active Art Unit | 3788 |
| Art Unit(s) | 3788, 3728, 3735, 4159 |
| Total Applications | 461 |
| Issued Applications | 162 |
| Pending Applications | 0 |
| Abandoned Applications | 300 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1297363
[patent_doc_number] => 06627503
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-30
[patent_title] => 'Method of forming a multilayer dielectric stack'
[patent_app_type] => B2
[patent_app_number] => 10/137567
[patent_app_country] => US
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[pdf_file] => patents/06/627/06627503.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137567 | Method of forming a multilayer dielectric stack | Apr 29, 2002 | Issued |
Array
(
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[patent_issue_date] => 2003-10-21
[patent_title] => 'Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions'
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Array
(
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[patent_doc_number] => 20020187592
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[patent_issue_date] => 2002-12-12
[patent_title] => 'Method for forming a thin-film transistor'
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Array
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[patent_issue_date] => 2003-10-09
[patent_title] => 'Physically deposited layer to electrically connect circuit edit connection targets'
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Array
(
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[patent_title] => 'Method for frabricating semiconductor device'
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Array
(
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Array
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[patent_title] => 'Interconnections for a semiconductor device and method for forming same'
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Array
(
[id] => 6522727
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[patent_title] => 'Lateral PNP-type transistor based on a vertical NPN-structure and process for producing such PNP-type transistor'
[patent_app_type] => new
[patent_app_number] => 10/007917
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007917 | Lateral PNP-type transistor based on a vertical NPN-structure and process for producing such PNP-type transistor | Dec 6, 2001 | Abandoned |
Array
(
[id] => 1164936
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[patent_title] => 'Method of producing a ferroelectric memory and a memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/006347 | Method of producing a ferroelectric memory and a memory device | Dec 3, 2001 | Issued |
Array
(
[id] => 1210902
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[patent_issue_date] => 2004-03-30
[patent_title] => 'Borderless contact architecture'
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[patent_app_number] => 10/010837
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/010837 | Borderless contact architecture | Dec 3, 2001 | Issued |
Array
(
[id] => 6405929
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[patent_title] => 'Chemical mechanical polishing for forming a shallow trench isolation structure'
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Array
(
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Array
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Array
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Array
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Array
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