
Kaushikkumar M. Patel
Examiner (ID: 9402, Phone: (571)272-5536 , Office: P/2138 )
| Most Active Art Unit | 2138 |
| Art Unit(s) | 2138, 2186, 2188 |
| Total Applications | 1024 |
| Issued Applications | 814 |
| Pending Applications | 45 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8935578
[patent_doc_number] => 08495295
[patent_country] => US
[patent_kind] => B2
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[patent_title] => 'Mass storage system and method of operating thereof'
[patent_app_type] => utility
[patent_app_number] => 12/776708
[patent_app_country] => US
[patent_app_date] => 2010-05-10
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776708
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/776708 | Mass storage system and method of operating thereof | May 9, 2010 | Issued |
Array
(
[id] => 10901438
[patent_doc_number] => 08924681
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[patent_kind] => B1
[patent_issue_date] => 2014-12-30
[patent_title] => 'Systems, methods, and computer readable media for an adaptative block allocation mechanism'
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Array
(
[id] => 8060589
[patent_doc_number] => 20110246724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-06
[patent_title] => 'System and Method for Providing Locale-Based Optimizations In a Transactional Memory'
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[patent_app_number] => 12/750884
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[firstpage_image] =>[orig_patent_app_number] => 12750884
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/750884 | System and method for providing locale-based optimizations in a transactional memory | Mar 30, 2010 | Issued |
Array
(
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[patent_doc_number] => 20100257327
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[patent_issue_date] => 2010-10-07
[patent_title] => 'MEMORY DEVICE AND SYSTEM INCLUDING A MEMORY DEVICE ELECTRONICALLY CONNECTABLE TO A HOST CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/751438
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/751438 | Memory device and system including a memory device electronically connectable to a host circuit | Mar 30, 2010 | Issued |
Array
(
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[patent_issue_date] => 2011-10-06
[patent_title] => 'CONSTRAINED CODING TO REDUCE FLOATING GATE COUPLING IN NON-VOLATILE MEMORIES'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/751197 | Constrained coding to reduce floating gate coupling in non-volatile memories | Mar 30, 2010 | Issued |
Array
(
[id] => 8060595
[patent_doc_number] => 20110246725
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[patent_issue_date] => 2011-10-06
[patent_title] => 'System and Method for Committing Results of a Software Transaction Using a Hardware Transaction'
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[patent_app_number] => 12/750908
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/750908 | System and method for committing results of a software transaction using a hardware transaction | Mar 30, 2010 | Issued |
Array
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[patent_title] => 'Systems, methods, and computer readable media for triggering and coordinating pool storage reclamation'
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Array
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[id] => 8546323
[patent_doc_number] => 08321626
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[patent_issue_date] => 2012-11-27
[patent_title] => 'Management of configuration data using persistent memories requiring block-wise erase before rewriting'
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[patent_app_number] => 12/750724
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Array
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[id] => 8449087
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[patent_title] => 'Memory device accepting write data and inverted write data from a host circuit'
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Array
(
[id] => 8060605
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[patent_title] => 'METHOD AND APPARATUS FOR PROVIDING AUTOMATIC SYNCHRONIZATION APPLIANCE'
[patent_app_type] => utility
[patent_app_number] => 12/751691
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Array
(
[id] => 6532761
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Array
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Array
(
[id] => 4510694
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Array
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Array
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Array
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Array
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