Search

Kawing Chan

Examiner (ID: 11370, Phone: (571)270-3909 , Office: P/2837 )

Most Active Art Unit
2837
Art Unit(s)
2846, 4147, 2837
Total Applications
913
Issued Applications
626
Pending Applications
74
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4774022 [patent_doc_number] => 20080059684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'APPARATUS FOR COORDINATING INTEROPERABILITY BETWEEN DEVICES OF VARYING CAPABILITIES IN A NETWORK' [patent_app_type] => utility [patent_app_number] => 11/934446 [patent_app_country] => US [patent_app_date] => 2007-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20080059684.pdf [firstpage_image] =>[orig_patent_app_number] => 11934446 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/934446
Apparatus for coordinating interoperability between devices of varying capabilities in a network Nov 1, 2007 Issued
Array ( [id] => 5332623 [patent_doc_number] => 20090113100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'Logic gateway circuit for bus that supports multiple interrupt request signals' [patent_app_type] => utility [patent_app_number] => 11/979078 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2669 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20090113100.pdf [firstpage_image] =>[orig_patent_app_number] => 11979078 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/979078
Logic gateway circuit for bus that supports multiple interrupt request signals Oct 30, 2007 Issued
Array ( [id] => 580801 [patent_doc_number] => 07472213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Resource management device' [patent_app_type] => utility [patent_app_number] => 11/979121 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6261 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/472/07472213.pdf [firstpage_image] =>[orig_patent_app_number] => 11979121 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/979121
Resource management device Oct 30, 2007 Issued
Array ( [id] => 5329519 [patent_doc_number] => 20090109996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'Network on Chip' [patent_app_type] => utility [patent_app_number] => 11/926212 [patent_app_country] => US [patent_app_date] => 2007-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6240 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20090109996.pdf [firstpage_image] =>[orig_patent_app_number] => 11926212 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/926212
Network on Chip Oct 28, 2007 Abandoned
Array ( [id] => 5430165 [patent_doc_number] => 20090089475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'Low latency interface between device driver and network interface card' [patent_app_type] => utility [patent_app_number] => 11/906098 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5662 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20090089475.pdf [firstpage_image] =>[orig_patent_app_number] => 11906098 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/906098
Low latency interface between device driver and network interface card Sep 27, 2007 Abandoned
Array ( [id] => 5427521 [patent_doc_number] => 20090086831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'TWO-WIRE COMMUNICATIONS BUS SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/862618 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20090086831.pdf [firstpage_image] =>[orig_patent_app_number] => 11862618 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862618
Two-wire communications bus system Sep 26, 2007 Issued
Array ( [id] => 5510264 [patent_doc_number] => 20090083471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-26 [patent_title] => 'METHOD AND APPARATUS FOR PROVIDING ACCELERATOR SUPPORT IN A BUS PROTOCOL' [patent_app_type] => utility [patent_app_number] => 11/858228 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20090083471.pdf [firstpage_image] =>[orig_patent_app_number] => 11858228 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/858228
Method and apparatus for providing accelerator support in a bus protocol Sep 19, 2007 Issued
Array ( [id] => 4923636 [patent_doc_number] => 20080071953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Memory access security management' [patent_app_type] => utility [patent_app_number] => 11/898640 [patent_app_country] => US [patent_app_date] => 2007-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6146 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20080071953.pdf [firstpage_image] =>[orig_patent_app_number] => 11898640 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/898640
Memory access security management Sep 12, 2007 Issued
Array ( [id] => 5200682 [patent_doc_number] => 20070300000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'METHOD FOR INTERFACING COMPONENTS OF A COMPUTING SYSTEM WITH A PAIR OF UNIDIRECTIONAL, POINT-TO-POINT BUSES' [patent_app_type] => utility [patent_app_number] => 11/854004 [patent_app_country] => US [patent_app_date] => 2007-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6326 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20070300000.pdf [firstpage_image] =>[orig_patent_app_number] => 11854004 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854004
Method for interfacing components of a computing system with a pair of unidirectional, point-to-point buses Sep 11, 2007 Issued
Array ( [id] => 4510529 [patent_doc_number] => 07949809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Peripheral component interconnect express interface and method for signal processing' [patent_app_type] => utility [patent_app_number] => 11/852976 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 13425 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/949/07949809.pdf [firstpage_image] =>[orig_patent_app_number] => 11852976 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/852976
Peripheral component interconnect express interface and method for signal processing Sep 9, 2007 Issued
Array ( [id] => 4801104 [patent_doc_number] => 20080012691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'Electronic Warning System' [patent_app_type] => utility [patent_app_number] => 11/832734 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2623 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20080012691.pdf [firstpage_image] =>[orig_patent_app_number] => 11832734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832734
Electronic Warning System Aug 1, 2007 Issued
Array ( [id] => 5047521 [patent_doc_number] => 20070266195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Internet SCSI Communication via UNDI Services' [patent_app_type] => utility [patent_app_number] => 11/828112 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20070266195.pdf [firstpage_image] =>[orig_patent_app_number] => 11828112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/828112
Internet SCSI communication via UNDI services Jul 24, 2007 Issued
Array ( [id] => 5226605 [patent_doc_number] => 20070255872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'BUS SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/780031 [patent_app_country] => US [patent_app_date] => 2007-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9313 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255872.pdf [firstpage_image] =>[orig_patent_app_number] => 11780031 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/780031
BUS SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT Jul 18, 2007 Abandoned
Array ( [id] => 5351789 [patent_doc_number] => 20090007150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Method and Apparatus for Improving the Efficiency of Interrupt Delivery at Runtime in a Network System' [patent_app_type] => utility [patent_app_number] => 11/771209 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6240 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20090007150.pdf [firstpage_image] =>[orig_patent_app_number] => 11771209 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771209
Method and apparatus for improving the efficiency of interrupt delivery at runtime in a network system Jun 28, 2007 Issued
Array ( [id] => 4804676 [patent_doc_number] => 20080016265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND DATA COMMUNICATION DEVICE' [patent_app_type] => utility [patent_app_number] => 11/767207 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8865 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016265.pdf [firstpage_image] =>[orig_patent_app_number] => 11767207 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767207
INFORMATION PROCESSING APPARATUS AND DATA COMMUNICATION DEVICE Jun 21, 2007 Abandoned
Array ( [id] => 208397 [patent_doc_number] => 07631127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Methods and systems for varying bus frequencies' [patent_app_type] => utility [patent_app_number] => 11/764167 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/631/07631127.pdf [firstpage_image] =>[orig_patent_app_number] => 11764167 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/764167
Methods and systems for varying bus frequencies Jun 14, 2007 Issued
Array ( [id] => 9926217 [patent_doc_number] => 08984202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Multiple host support for remote expansion apparatus' [patent_app_type] => utility [patent_app_number] => 11/762201 [patent_app_country] => US [patent_app_date] => 2007-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11612 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11762201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/762201
Multiple host support for remote expansion apparatus Jun 12, 2007 Issued
Array ( [id] => 10890553 [patent_doc_number] => 08914565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Locking or loading an object node' [patent_app_type] => utility [patent_app_number] => 11/760223 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5423 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11760223 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/760223
Locking or loading an object node Jun 7, 2007 Issued
Array ( [id] => 97160 [patent_doc_number] => 07739435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'System and method for enhancing I2C bus data rate' [patent_app_type] => utility [patent_app_number] => 11/752363 [patent_app_country] => US [patent_app_date] => 2007-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4197 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/739/07739435.pdf [firstpage_image] =>[orig_patent_app_number] => 11752363 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/752363
System and method for enhancing I2C bus data rate May 22, 2007 Issued
Array ( [id] => 4879934 [patent_doc_number] => 20080153317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Fabric Interfacing Architecture For A Node Blade' [patent_app_type] => utility [patent_app_number] => 11/751035 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3569 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153317.pdf [firstpage_image] =>[orig_patent_app_number] => 11751035 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/751035
Fabric Interfacing Architecture For A Node Blade May 20, 2007 Abandoned
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