Kawing Chan

Array ( [id] => 5381327 [patent_doc_number] => 20090193166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'DEVICE AND METHOD FOR ADDRESSING, AND CONVERTER' [patent_app_type] => utility [patent_app_number] => 12/303106 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193166.pdf [firstpage_image] =>[orig_patent_app_number] => 12303106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8109233 [patent_doc_number] => 08156273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-10 [patent_title] => 'Method and system for controlling transmission and execution of commands in an integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/747087 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/156/08156273.pdf [firstpage_image] =>[orig_patent_app_number] => 11747087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5226612 [patent_doc_number] => 20070255879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'System for programmed control of signal input and output to and from cable conductors' [patent_app_type] => utility [patent_app_number] => 11/801127 [patent_app_country] => US [patent_app_date] => 2007-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7369 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255879.pdf [firstpage_image] =>[orig_patent_app_number] => 11801127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5068212 [patent_doc_number] => 20070189313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'MULTI-NODE ARCHITECTURE WITH DAISY CHAIN COMMUNICATION LINK CONFIGURABLE TO OPERATE IN UNIDIRECTIONAL AND BIDIRECTIONAL MODES' [patent_app_type] => utility [patent_app_number] => 11/740640 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6370 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20070189313.pdf [firstpage_image] =>[orig_patent_app_number] => 11740640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 914483 [patent_doc_number] => 07330926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'Interruption control system' [patent_app_type] => utility [patent_app_number] => 11/735111 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2661 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/330/07330926.pdf [firstpage_image] =>[orig_patent_app_number] => 11735111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5127654 [patent_doc_number] => 20070239925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'PCI express link, multi host computer system, and method of reconfiguring PCI express link' [patent_app_type] => utility [patent_app_number] => 11/783346 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7446 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20070239925.pdf [firstpage_image] =>[orig_patent_app_number] => 11783346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 825519 [patent_doc_number] => 07406552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Systems and methods for early fixed latency subtractive decoding including speculative acknowledging' [patent_app_type] => utility [patent_app_number] => 11/724765 [patent_app_country] => US [patent_app_date] => 2007-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4216 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/406/07406552.pdf [firstpage_image] =>[orig_patent_app_number] => 11724765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4825595 [patent_doc_number] => 20080228905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Travelers/Commuters Portable Staging Device' [patent_app_type] => utility [patent_app_number] => 11/685680 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3959 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20080228905.pdf [firstpage_image] =>[orig_patent_app_number] => 11685680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10867081 [patent_doc_number] => 08892806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Integrated circuit, memory device, method of operating an integrated circuit, and method of designing an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/683357 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6354 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11683357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8574661 [patent_doc_number] => 08341322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Device and method for scheduling transactions over a deep pipelined component' [patent_app_type] => utility [patent_app_number] => 12/529749 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12529749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5089188 [patent_doc_number] => 20070228827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Synchronous or asynchronous multi layer data link communication between a multi-functional data bus interface and a transponder bypass for automotive aftermarket security system and/or remote car starter' [patent_app_type] => utility [patent_app_number] => 11/706254 [patent_app_country] => US [patent_app_date] => 2007-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1388 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20070228827.pdf [firstpage_image] =>[orig_patent_app_number] => 11706254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5114848 [patent_doc_number] => 20070198764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Semiconductor arrangement and method for operating a semiconductor arrangement' [patent_app_type] => utility [patent_app_number] => 11/706857 [patent_app_country] => US [patent_app_date] => 2007-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6793 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20070198764.pdf [firstpage_image] =>[orig_patent_app_number] => 11706857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4815175 [patent_doc_number] => 20080195806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'System and method for controlling memory operations' [patent_app_type] => utility [patent_app_number] => 11/704656 [patent_app_country] => US [patent_app_date] => 2007-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5297 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195806.pdf [firstpage_image] =>[orig_patent_app_number] => 11704656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 96844 [patent_doc_number] => 07734860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Signal processor' [patent_app_type] => utility [patent_app_number] => 11/704042 [patent_app_country] => US [patent_app_date] => 2007-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2439 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/734/07734860.pdf [firstpage_image] =>[orig_patent_app_number] => 11704042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 309405 [patent_doc_number] => 07533209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Universal serial bus circuit which detects connection status to a USB host' [patent_app_type] => utility [patent_app_number] => 11/672485 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3806 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/533/07533209.pdf [firstpage_image] =>[orig_patent_app_number] => 11672485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4847529 [patent_doc_number] => 20080183937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Method and Apparatus to Reduce EMI Emissions Over Wide Port SAS Buses' [patent_app_type] => utility [patent_app_number] => 11/669283 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20080183937.pdf [firstpage_image] =>[orig_patent_app_number] => 11669283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4600511 [patent_doc_number] => 07984214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-19 [patent_title] => 'Data bus interface with interruptible clock' [patent_app_type] => utility [patent_app_number] => 12/223306 [patent_app_country] => US [patent_app_date] => 2007-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3806 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/984/07984214.pdf [firstpage_image] =>[orig_patent_app_number] => 12223306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 288429 [patent_doc_number] => 07552270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Signal transmission method, bridge unit, and information processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/651417 [patent_app_country] => US [patent_app_date] => 2007-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5704 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/552/07552270.pdf [firstpage_image] =>[orig_patent_app_number] => 11651417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9063 [patent_doc_number] => 07814249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Apparatus to recognize memory devices' [patent_app_type] => utility [patent_app_number] => 11/646445 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5639 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/814/07814249.pdf [firstpage_image] =>[orig_patent_app_number] => 11646445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 288411 [patent_doc_number] => 07552253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Systems and methods for determining size of a device buffer' [patent_app_type] => utility [patent_app_number] => 11/610701 [patent_app_country] => US [patent_app_date] => 2006-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3638 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/552/07552253.pdf [firstpage_image] =>[orig_patent_app_number] => 11610701 [rel_patent_id] =>[rel_patent_doc_number] =>)