Search

Kee M. Tung

Supervisory Patent Examiner (ID: 3608, Phone: (571)272-7794 , Office: P/2611 )

Most Active Art Unit
2676
Art Unit(s)
2611, 2303, 2773, 2317, 2671, 2677, 2311, 2776, 2676, 2628, 2415, 2745
Total Applications
1413
Issued Applications
1052
Pending Applications
71
Abandoned Applications
292

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7287188 [patent_doc_number] => 20040109003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'TEXTURE CREATING METHOD, TEXTURE CREATING APPARATUS AND COMPUTER-READABLE RECORDING MEDIUM CONTAINING TEXTURE CREATING PROGRAM.' [patent_app_type] => new [patent_app_number] => 10/309676 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5704 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109003.pdf [firstpage_image] =>[orig_patent_app_number] => 10309676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/309676
Texture creating method, texture creating apparatus and computer-readable recording medium containing texture creating program Dec 3, 2002 Issued
Array ( [id] => 7630710 [patent_doc_number] => 06636226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method and apparatus for controlling compressed Z information in a video graphics system' [patent_app_type] => B2 [patent_app_number] => 10/303593 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6048 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636226.pdf [firstpage_image] =>[orig_patent_app_number] => 10303593 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/303593
Method and apparatus for controlling compressed Z information in a video graphics system Nov 24, 2002 Issued
Array ( [id] => 6812266 [patent_doc_number] => 20030071816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Symmetrical accelerated graphics port (AGP)' [patent_app_type] => new [patent_app_number] => 10/304497 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6947 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071816.pdf [firstpage_image] =>[orig_patent_app_number] => 10304497 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304497
Symmetrical accelerated graphics port (AGP) Nov 24, 2002 Issued
Array ( [id] => 986168 [patent_doc_number] => 06924810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-02 [patent_title] => 'Hierarchical texture cache' [patent_app_type] => utility [patent_app_number] => 10/299367 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5216 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924810.pdf [firstpage_image] =>[orig_patent_app_number] => 10299367 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/299367
Hierarchical texture cache Nov 17, 2002 Issued
Array ( [id] => 6777193 [patent_doc_number] => 20030048274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Data processing apparatus having DRAM incorporated therein' [patent_app_type] => new [patent_app_number] => 10/284153 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10018 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20030048274.pdf [firstpage_image] =>[orig_patent_app_number] => 10284153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284153
Data processing apparatus having DRAM incorporated therein Oct 30, 2002 Issued
Array ( [id] => 1162428 [patent_doc_number] => 06762762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Graphics accelerator' [patent_app_type] => B2 [patent_app_number] => 10/282822 [patent_app_country] => US [patent_app_date] => 2002-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 36763 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762762.pdf [firstpage_image] =>[orig_patent_app_number] => 10282822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/282822
Graphics accelerator Oct 27, 2002 Issued
Array ( [id] => 854203 [patent_doc_number] => RE040326 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2008-05-20 [patent_title] => 'Single chip frame buffer and graphics accelerator' [patent_app_type] => reissue [patent_app_number] => 10/264013 [patent_app_country] => US [patent_app_date] => 2002-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 10457 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/040/RE040326.pdf [firstpage_image] =>[orig_patent_app_number] => 10264013 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/264013
Single chip frame buffer and graphics accelerator Oct 3, 2002 Issued
Array ( [id] => 6743536 [patent_doc_number] => 20030020719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Re-generating a displayed image' [patent_app_type] => new [patent_app_number] => 10/247645 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7779 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020719.pdf [firstpage_image] =>[orig_patent_app_number] => 10247645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247645
Re-generating a displayed image Sep 18, 2002 Issued
Array ( [id] => 745600 [patent_doc_number] => 07031206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Digital line delay using a single port memory' [patent_app_type] => utility [patent_app_number] => 10/490015 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4029 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031206.pdf [firstpage_image] =>[orig_patent_app_number] => 10490015 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/490015
Digital line delay using a single port memory Sep 18, 2002 Issued
Array ( [id] => 973352 [patent_doc_number] => 06937243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Transmission circuit and manufacture method for the same' [patent_app_type] => utility [patent_app_number] => 10/200343 [patent_app_country] => US [patent_app_date] => 2002-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937243.pdf [firstpage_image] =>[orig_patent_app_number] => 10200343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200343
Transmission circuit and manufacture method for the same Jul 22, 2002 Issued
Array ( [id] => 7350666 [patent_doc_number] => 20040012609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Data management to enable video rate anti-aliasing convolution' [patent_app_type] => new [patent_app_number] => 10/200087 [patent_app_country] => US [patent_app_date] => 2002-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13059 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012609.pdf [firstpage_image] =>[orig_patent_app_number] => 10200087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200087
Data management to enable video rate anti-aliasing convolution Jul 18, 2002 Issued
Array ( [id] => 7430887 [patent_doc_number] => 20040008200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Method for context switching a graphics accelerator comprising multiple rendering pipelines' [patent_app_type] => new [patent_app_number] => 10/194446 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11798 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008200.pdf [firstpage_image] =>[orig_patent_app_number] => 10194446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/194446
Method for context switching a graphics accelerator comprising multiple rendering pipelines Jul 11, 2002 Issued
Array ( [id] => 635421 [patent_doc_number] => 07129952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-31 [patent_title] => 'Core logic circuit of computer system capable of accelerating 3D graphics' [patent_app_type] => utility [patent_app_number] => 10/176398 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3053 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/129/07129952.pdf [firstpage_image] =>[orig_patent_app_number] => 10176398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176398
Core logic circuit of computer system capable of accelerating 3D graphics Jun 20, 2002 Issued
Array ( [id] => 1107396 [patent_doc_number] => 06812927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'System and method for avoiding depth clears using a stencil buffer' [patent_app_type] => B1 [patent_app_number] => 10/175199 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5708 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812927.pdf [firstpage_image] =>[orig_patent_app_number] => 10175199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175199
System and method for avoiding depth clears using a stencil buffer Jun 17, 2002 Issued
Array ( [id] => 1156042 [patent_doc_number] => 06771271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Apparatus and method of processing image data' [patent_app_type] => B2 [patent_app_number] => 10/170604 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6414 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/771/06771271.pdf [firstpage_image] =>[orig_patent_app_number] => 10170604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170604
Apparatus and method of processing image data Jun 12, 2002 Issued
Array ( [id] => 1015631 [patent_doc_number] => 06894692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'System and method for sychronizing video data streams' [patent_app_type] => utility [patent_app_number] => 10/167098 [patent_app_country] => US [patent_app_date] => 2002-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7027 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894692.pdf [firstpage_image] =>[orig_patent_app_number] => 10167098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167098
System and method for sychronizing video data streams Jun 10, 2002 Issued
Array ( [id] => 6640346 [patent_doc_number] => 20030006992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Data transfer device and method' [patent_app_type] => new [patent_app_number] => 10/146892 [patent_app_country] => US [patent_app_date] => 2002-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13599 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20030006992.pdf [firstpage_image] =>[orig_patent_app_number] => 10146892 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146892
Data transfer device and method May 16, 2002 Issued
Array ( [id] => 748238 [patent_doc_number] => 07027056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Graphics engine, and display driver IC and display module incorporating the graphics engine' [patent_app_type] => utility [patent_app_number] => 10/141797 [patent_app_country] => US [patent_app_date] => 2002-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 12094 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027056.pdf [firstpage_image] =>[orig_patent_app_number] => 10141797 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/141797
Graphics engine, and display driver IC and display module incorporating the graphics engine May 9, 2002 Issued
Array ( [id] => 1019353 [patent_doc_number] => 06891543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Method and system for optimally sharing memory between a host processor and graphics processor' [patent_app_type] => utility [patent_app_number] => 10/140263 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10637 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891543.pdf [firstpage_image] =>[orig_patent_app_number] => 10140263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140263
Method and system for optimally sharing memory between a host processor and graphics processor May 7, 2002 Issued
Array ( [id] => 1416043 [patent_doc_number] => 06535216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Multi-processor graphics accelerator' [patent_app_type] => B1 [patent_app_number] => 10/136585 [patent_app_country] => US [patent_app_date] => 2002-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 15731 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535216.pdf [firstpage_image] =>[orig_patent_app_number] => 10136585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136585
Multi-processor graphics accelerator Apr 30, 2002 Issued
Menu