Search

Kee M. Tung

Supervisory Patent Examiner (ID: 3608, Phone: (571)272-7794 , Office: P/2611 )

Most Active Art Unit
2676
Art Unit(s)
2611, 2303, 2773, 2317, 2671, 2677, 2311, 2776, 2676, 2628, 2415, 2745
Total Applications
1413
Issued Applications
1052
Pending Applications
71
Abandoned Applications
292

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1098581 [patent_doc_number] => 06822654 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-23 [patent_title] => 'Memory controller chipset' [patent_app_type] => B1 [patent_app_number] => 10/038700 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45583 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822654.pdf [firstpage_image] =>[orig_patent_app_number] => 10038700 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038700
Memory controller chipset Dec 30, 2001 Issued
Array ( [id] => 6759459 [patent_doc_number] => 20030122820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Object culling in zone rendering' [patent_app_type] => new [patent_app_number] => 10/039024 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4635 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122820.pdf [firstpage_image] =>[orig_patent_app_number] => 10039024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039024
Object culling in zone rendering Dec 30, 2001 Abandoned
Array ( [id] => 1180556 [patent_doc_number] => 06747653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Efficient object storage for zone rendering' [patent_app_type] => B2 [patent_app_number] => 10/039006 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3714 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747653.pdf [firstpage_image] =>[orig_patent_app_number] => 10039006 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039006
Efficient object storage for zone rendering Dec 30, 2001 Issued
Array ( [id] => 6759728 [patent_doc_number] => 20030123089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Graphics state bandwidth reduction for zone rendering' [patent_app_type] => new [patent_app_number] => 10/038922 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6927 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20030123089.pdf [firstpage_image] =>[orig_patent_app_number] => 10038922 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038922
Graphics state bandwidth reduction for zone rendering Dec 30, 2001 Abandoned
Array ( [id] => 1180584 [patent_doc_number] => 06747658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Automatic memory management for zone rendering' [patent_app_type] => B2 [patent_app_number] => 10/038921 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5867 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747658.pdf [firstpage_image] =>[orig_patent_app_number] => 10038921 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038921
Automatic memory management for zone rendering Dec 30, 2001 Issued
Array ( [id] => 1180574 [patent_doc_number] => 06747657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Depth write disable for zone rendering' [patent_app_type] => B2 [patent_app_number] => 10/038814 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5944 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747657.pdf [firstpage_image] =>[orig_patent_app_number] => 10038814 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038814
Depth write disable for zone rendering Dec 30, 2001 Issued
Array ( [id] => 1184612 [patent_doc_number] => 06738069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Efficient graphics state management for zone rendering' [patent_app_type] => B2 [patent_app_number] => 10/039007 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6910 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738069.pdf [firstpage_image] =>[orig_patent_app_number] => 10039007 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039007
Efficient graphics state management for zone rendering Dec 30, 2001 Issued
Array ( [id] => 1084027 [patent_doc_number] => 06833832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Local bit-plane memory for spatial light modulator' [patent_app_type] => B2 [patent_app_number] => 10/039392 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833832.pdf [firstpage_image] =>[orig_patent_app_number] => 10039392 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039392
Local bit-plane memory for spatial light modulator Dec 30, 2001 Issued
Array ( [id] => 1233791 [patent_doc_number] => 06693637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Method and apparatus for determining bins to be updated for polygons, including lines' [patent_app_type] => B2 [patent_app_number] => 10/038924 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5724 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693637.pdf [firstpage_image] =>[orig_patent_app_number] => 10038924 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038924
Method and apparatus for determining bins to be updated for polygons, including lines Dec 30, 2001 Issued
Array ( [id] => 760828 [patent_doc_number] => 07015921 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Method and apparatus for memory access' [patent_app_type] => utility [patent_app_number] => 10/038905 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45516 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015921.pdf [firstpage_image] =>[orig_patent_app_number] => 10038905 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038905
Method and apparatus for memory access Dec 30, 2001 Issued
Array ( [id] => 1231072 [patent_doc_number] => 06697076 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Method and apparatus for address re-mapping' [patent_app_type] => B1 [patent_app_number] => 10/038456 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45594 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697076.pdf [firstpage_image] =>[orig_patent_app_number] => 10038456 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038456
Method and apparatus for address re-mapping Dec 30, 2001 Issued
Array ( [id] => 7609098 [patent_doc_number] => 06999091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Dual memory channel interleaving for graphics and video' [patent_app_type] => utility [patent_app_number] => 10/033439 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6132 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/999/06999091.pdf [firstpage_image] =>[orig_patent_app_number] => 10033439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/033439
Dual memory channel interleaving for graphics and video Dec 27, 2001 Issued
Array ( [id] => 1129659 [patent_doc_number] => 06791554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'I/O node for a computer system including an integrated graphics engine' [patent_app_type] => B1 [patent_app_number] => 10/034560 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4111 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791554.pdf [firstpage_image] =>[orig_patent_app_number] => 10034560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034560
I/O node for a computer system including an integrated graphics engine Dec 26, 2001 Issued
Array ( [id] => 6583296 [patent_doc_number] => 20020085009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Memory control apparatus and method' [patent_app_type] => new [patent_app_number] => 10/025813 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8287 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20020085009.pdf [firstpage_image] =>[orig_patent_app_number] => 10025813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025813
Memory control apparatus and method Dec 25, 2001 Issued
Array ( [id] => 1190608 [patent_doc_number] => 06734868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Address generator for video pixel reordering in reflective LCD' [patent_app_type] => B2 [patent_app_number] => 10/028380 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 36 [patent_no_of_words] => 1570 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734868.pdf [firstpage_image] =>[orig_patent_app_number] => 10028380 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/028380
Address generator for video pixel reordering in reflective LCD Dec 20, 2001 Issued
Array ( [id] => 6854715 [patent_doc_number] => 20030128216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'System and method for automatically configuring graphics pipelines by tracking a region of interest in a computer graphical display system' [patent_app_type] => new [patent_app_number] => 10/028869 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10775 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128216.pdf [firstpage_image] =>[orig_patent_app_number] => 10028869 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/028869
System and method for automatically configuring graphics pipelines by tracking a region of interest in a computer graphical display system Dec 20, 2001 Issued
Array ( [id] => 6681541 [patent_doc_number] => 20030117405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Systems and methods for performing memory management operations to provide displays of complex virtual environments' [patent_app_type] => new [patent_app_number] => 10/023996 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 29734 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20030117405.pdf [firstpage_image] =>[orig_patent_app_number] => 10023996 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023996
Performing memory management operations to provide displays of complex virtual environments Dec 20, 2001 Issued
Array ( [id] => 6667265 [patent_doc_number] => 20030112248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'VGA quad device and apparatuses including same' [patent_app_type] => new [patent_app_number] => 10/024780 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4093 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112248.pdf [firstpage_image] =>[orig_patent_app_number] => 10024780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/024780
VGA quad device and apparatuses including same Dec 18, 2001 Abandoned
Array ( [id] => 6698050 [patent_doc_number] => 20030110244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Systems and methods for capturing screen displays from a host computing system for display at a remote terminal' [patent_app_type] => new [patent_app_number] => 10/016484 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8110 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110244.pdf [firstpage_image] =>[orig_patent_app_number] => 10016484 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016484
Systems and methods for capturing screen displays from a host computing system for display at a remote terminal Dec 9, 2001 Issued
Array ( [id] => 6695384 [patent_doc_number] => 20030107578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Sparse refresh of display' [patent_app_type] => new [patent_app_number] => 10/007923 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3587 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107578.pdf [firstpage_image] =>[orig_patent_app_number] => 10007923 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007923
Sparse refresh of display Dec 6, 2001 Issued
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