Search

Keith D. Hendricks

Supervisory Patent Examiner (ID: 23, Phone: (571)272-1401 , Office: P/1756 )

Most Active Art Unit
1761
Art Unit(s)
1652, 1649, 1804, 1781, 1761, 1814, 1733, 1794, 1756, 2899
Total Applications
1067
Issued Applications
617
Pending Applications
142
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20205609 [patent_doc_number] => 12408405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Device comprising spacers including a localised airgap and associated manufacturing methods [patent_app_type] => utility [patent_app_number] => 17/966217 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17966217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/966217
Device comprising spacers including a localised airgap and associated manufacturing methods Oct 13, 2022 Issued
Array ( [id] => 20169396 [patent_doc_number] => 20250261443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => QUICK START FOR IEDS [patent_app_type] => utility [patent_app_number] => 19/119588 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19119588 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/119588
Manufacturing method for a power semiconductor device and power semiconductor device Oct 9, 2022 Issued
Array ( [id] => 19086185 [patent_doc_number] => 20240112986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => COMPOSITE CONTACT BETWEEN BACKSIDE POWER ELEMENT AND SOURCE/DRAIN REGION [patent_app_type] => utility [patent_app_number] => 17/955677 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955677 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955677
COMPOSITE CONTACT BETWEEN BACKSIDE POWER ELEMENT AND SOURCE/DRAIN REGION Sep 28, 2022 Pending
Array ( [id] => 19086317 [patent_doc_number] => 20240113118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => ULTRA-LOW VOLTAGE TRANSISTOR CELL DESIGN USING GATE CUT LAYOUT [patent_app_type] => utility [patent_app_number] => 17/956188 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956188 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956188
ULTRA-LOW VOLTAGE TRANSISTOR CELL DESIGN USING GATE CUT LAYOUT Sep 28, 2022 Pending
Array ( [id] => 18473379 [patent_doc_number] => 20230207667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => ULTRA-DENSE THREE-DIMENSIONAL TRANSISTOR DESIGN [patent_app_type] => utility [patent_app_number] => 17/952552 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952552
ULTRA-DENSE THREE-DIMENSIONAL TRANSISTOR DESIGN Sep 25, 2022 Pending
Array ( [id] => 18381962 [patent_doc_number] => 20230157053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/950835 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950835
DISPLAY DEVICE Sep 21, 2022 Pending
Array ( [id] => 18743540 [patent_doc_number] => 20230352528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => 3D-STACKED SEMICONDUCTOR DEVICE HAVING DIFFERENT CHANNEL AND GATE DIMENSIONS ACROSS LOWER STACK AND UPPER STACK [patent_app_type] => utility [patent_app_number] => 17/945695 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945695
3D-STACKED SEMICONDUCTOR DEVICE HAVING DIFFERENT CHANNEL AND GATE DIMENSIONS ACROSS LOWER STACK AND UPPER STACK Sep 14, 2022 Pending
Array ( [id] => 20509093 [patent_doc_number] => 12543385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Single-photon avalanche diode with isolated junctions [patent_app_type] => utility [patent_app_number] => 17/943638 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943638
Single-photon avalanche diode with isolated junctions Sep 12, 2022 Issued
Array ( [id] => 19023236 [patent_doc_number] => 20240079407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => FOLDED SERIES SWITCHES [patent_app_type] => utility [patent_app_number] => 17/939392 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939392
FOLDED SERIES SWITCHES Sep 6, 2022 Pending
Array ( [id] => 18410614 [patent_doc_number] => 20230171967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/903907 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903907
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Sep 5, 2022 Pending
Array ( [id] => 19010244 [patent_doc_number] => 20240074315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/900804 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900804 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900804
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Aug 30, 2022 Issued
Array ( [id] => 18244545 [patent_doc_number] => 20230076856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => ELECTROSTATIC DISCHARGE DEVICE AND DISPLAY DRIVING CHIP INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/899885 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899885 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899885
Electrostatic discharge device and display driving chip including the same Aug 30, 2022 Issued
Array ( [id] => 18898771 [patent_doc_number] => 20240014256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => THRESHOLD VOLTAGE MODULATION BY GATE HEIGHT VARIATION [patent_app_type] => utility [patent_app_number] => 17/899021 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899021 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899021
THRESHOLD VOLTAGE MODULATION BY GATE HEIGHT VARIATION Aug 29, 2022 Pending
Array ( [id] => 18959222 [patent_doc_number] => 20240047549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR DEVICE WITH SUPPORTING STRUCTURES AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/818285 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818285 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818285
SEMICONDUCTOR DEVICE WITH SUPPORTING STRUCTURES AND METHOD FOR FORMING THE SAME Aug 7, 2022 Pending
Array ( [id] => 20540268 [patent_doc_number] => 12557355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Stack type semiconductor device [patent_app_type] => utility [patent_app_number] => 17/879176 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4260 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879176 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879176
Stack type semiconductor device Aug 1, 2022 Issued
Array ( [id] => 18866125 [patent_doc_number] => 20230420562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => DIFFUSION CUT STRESSORS FOR STACKED TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/809329 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809329
DIFFUSION CUT STRESSORS FOR STACKED TRANSISTORS Jun 27, 2022 Pending
Array ( [id] => 18866006 [patent_doc_number] => 20230420443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => INTEGRATED CIRCUIT DEVICES WITH DIODES INTEGRATED IN SUBFINS [patent_app_type] => utility [patent_app_number] => 17/850414 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850414
INTEGRATED CIRCUIT DEVICES WITH DIODES INTEGRATED IN SUBFINS Jun 26, 2022 Pending
Array ( [id] => 18866076 [patent_doc_number] => 20230420513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => INTEGRATED CIRCUIT WITH BOTTOM DIELECTRIC INSULATORS AND FIN SIDEWALL SPACERS FOR REDUCING SOURCE/DRAIN LEAKAGE CURRENTS [patent_app_type] => utility [patent_app_number] => 17/850811 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850811
Integrated circuit with bottom dielectric insulators and fin sidewall spacers for reducing source/drain leakage currents Jun 26, 2022 Issued
Array ( [id] => 20452892 [patent_doc_number] => 12515942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => MEMS device comprising an insulated suspended diaphragm, in particular pressure sensor, and manufacturing process thereof [patent_app_type] => utility [patent_app_number] => 17/843483 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843483
MEMS device comprising an insulated suspended diaphragm, in particular pressure sensor, and manufacturing process thereof Jun 16, 2022 Issued
Array ( [id] => 18849111 [patent_doc_number] => 20230411515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR POWER DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/842771 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842771 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842771
Semiconductor power device and method of manufacturing the same Jun 15, 2022 Issued
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