Search

Keith E. Vicary

Examiner (ID: 11479, Phone: (571)270-1314 , Office: P/2182 )

Most Active Art Unit
2183
Art Unit(s)
2182, 2183
Total Applications
798
Issued Applications
429
Pending Applications
76
Abandoned Applications
310

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5476236 [patent_doc_number] => 20090249354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'RECORDING MEDIUM HAVING RECORDED THEREIN VIRTUAL MACHINE MANAGEMENT PROGRAM, MANAGEMENT SERVER APPARATUS AND VIRTUAL MACHINE MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 12/409603 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10032 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20090249354.pdf [firstpage_image] =>[orig_patent_app_number] => 12409603 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409603
RECORDING MEDIUM HAVING RECORDED THEREIN VIRTUAL MACHINE MANAGEMENT PROGRAM, MANAGEMENT SERVER APPARATUS AND VIRTUAL MACHINE MANAGEMENT METHOD Mar 23, 2009 Abandoned
Array ( [id] => 10847905 [patent_doc_number] => 08875107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Component lock tracing by associating component type parameters with particular lock instances' [patent_app_type] => utility [patent_app_number] => 12/409992 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3397 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12409992 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409992
Component lock tracing by associating component type parameters with particular lock instances Mar 23, 2009 Issued
Array ( [id] => 7682373 [patent_doc_number] => 20100242038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Providing a Trusted Environment for Provisioning a Virtual Machine' [patent_app_type] => utility [patent_app_number] => 12/407211 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20100242038.pdf [firstpage_image] =>[orig_patent_app_number] => 12407211 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407211
Providing a trusted environment for provisioning a virtual machine Mar 18, 2009 Issued
Array ( [id] => 11226721 [patent_doc_number] => 09454444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Using location tracking of cluster nodes to avoid single points of failure' [patent_app_type] => utility [patent_app_number] => 12/407237 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12407237 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407237
Using location tracking of cluster nodes to avoid single points of failure Mar 18, 2009 Issued
Array ( [id] => 10091925 [patent_doc_number] => 09128750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-08 [patent_title] => 'System and method for supporting multi-threaded transactions' [patent_app_type] => utility [patent_app_number] => 12/380677 [patent_app_country] => US [patent_app_date] => 2009-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 6316 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12380677 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/380677
System and method for supporting multi-threaded transactions Mar 1, 2009 Issued
Array ( [id] => 5504076 [patent_doc_number] => 20090164764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'PROCESSOR AND DEBUGGING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/394538 [patent_app_country] => US [patent_app_date] => 2009-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 11222 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20090164764.pdf [firstpage_image] =>[orig_patent_app_number] => 12394538 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/394538
PROCESSOR AND DEBUGGING DEVICE Feb 26, 2009 Abandoned
Array ( [id] => 5393340 [patent_doc_number] => 20090210653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'METHOD AND DEVICE FOR TREATING AND PROCESSING DATA' [patent_app_type] => utility [patent_app_number] => 12/389116 [patent_app_country] => US [patent_app_date] => 2009-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11962 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210653.pdf [firstpage_image] =>[orig_patent_app_number] => 12389116 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389116
METHOD AND DEVICE FOR TREATING AND PROCESSING DATA Feb 18, 2009 Abandoned
Array ( [id] => 6337539 [patent_doc_number] => 20100199074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'INSTRUCTION SET ARCHITECTURE WITH DECOMPOSING OPERANDS' [patent_app_type] => utility [patent_app_number] => 12/366169 [patent_app_country] => US [patent_app_date] => 2009-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20100199074.pdf [firstpage_image] =>[orig_patent_app_number] => 12366169 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/366169
Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance Feb 4, 2009 Issued
Array ( [id] => 6262691 [patent_doc_number] => 20100031007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'METHOD TO ACCELERATE NULL-TERMINATED STRING OPERATIONS' [patent_app_type] => utility [patent_app_number] => 12/365130 [patent_app_country] => US [patent_app_date] => 2009-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5148 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20100031007.pdf [firstpage_image] =>[orig_patent_app_number] => 12365130 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365130
METHOD TO ACCELERATE NULL-TERMINATED STRING OPERATIONS Feb 2, 2009 Abandoned
Array ( [id] => 6337531 [patent_doc_number] => 20100199072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Register file' [patent_app_type] => utility [patent_app_number] => 12/320710 [patent_app_country] => US [patent_app_date] => 2009-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6278 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20100199072.pdf [firstpage_image] =>[orig_patent_app_number] => 12320710 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320710
Register file with circuitry for setting register entries to a predetermined value Feb 1, 2009 Issued
Array ( [id] => 6337510 [patent_doc_number] => 20100199067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Split Vector Loads and Stores with Stride Separated Words' [patent_app_type] => utility [patent_app_number] => 12/363936 [patent_app_country] => US [patent_app_date] => 2009-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20100199067.pdf [firstpage_image] =>[orig_patent_app_number] => 12363936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363936
Split Vector Loads and Stores with Stride Separated Words Feb 1, 2009 Abandoned
Array ( [id] => 9062807 [patent_doc_number] => 08549260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Apparatus for processing data and method for generating manipulated and re-manipulated configuration data for processor' [patent_app_type] => utility [patent_app_number] => 12/361965 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6713 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12361965 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/361965
Apparatus for processing data and method for generating manipulated and re-manipulated configuration data for processor Jan 28, 2009 Issued
Array ( [id] => 6450166 [patent_doc_number] => 20100169880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'VIRTUAL INPUT-OUTPUT CONNECTIONS FOR MACHINE VIRTUALIZATION' [patent_app_type] => utility [patent_app_number] => 12/344235 [patent_app_country] => US [patent_app_date] => 2008-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5150 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169880.pdf [firstpage_image] =>[orig_patent_app_number] => 12344235 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/344235
Virtual input-output connections for machine virtualization Dec 24, 2008 Issued
Array ( [id] => 9630215 [patent_doc_number] => 08799909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-05 [patent_title] => 'System and method for independent synchronous and asynchronous transaction requests' [patent_app_type] => utility [patent_app_number] => 12/342985 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4462 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12342985 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342985
System and method for independent synchronous and asynchronous transaction requests Dec 22, 2008 Issued
Array ( [id] => 8678476 [patent_doc_number] => 08386610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'System and method for automatic storage load balancing in virtual server environments' [patent_app_type] => utility [patent_app_number] => 12/339733 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12394 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12339733 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339733
System and method for automatic storage load balancing in virtual server environments Dec 18, 2008 Issued
Array ( [id] => 6303051 [patent_doc_number] => 20100162251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'SYSTEM, METHOD, AND COMPUTER-READABLE MEDIUM FOR CLASSIFYING PROBLEM QUERIES TO REDUCE EXCEPTION PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/339574 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5244 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20100162251.pdf [firstpage_image] =>[orig_patent_app_number] => 12339574 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339574
SYSTEM, METHOD, AND COMPUTER-READABLE MEDIUM FOR CLASSIFYING PROBLEM QUERIES TO REDUCE EXCEPTION PROCESSING Dec 18, 2008 Abandoned
Array ( [id] => 9940988 [patent_doc_number] => 08990820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Runtime task with inherited dependencies for batch processing' [patent_app_type] => utility [patent_app_number] => 12/339083 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12339083 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339083
Runtime task with inherited dependencies for batch processing Dec 18, 2008 Issued
Array ( [id] => 5476166 [patent_doc_number] => 20090249332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'METHOD AND A COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/339180 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20090249332.pdf [firstpage_image] =>[orig_patent_app_number] => 12339180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339180
Computing device having a migrated virtual machine accessing physical storage space on another computing device Dec 18, 2008 Issued
Array ( [id] => 6303034 [patent_doc_number] => 20100162246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'USE OF ANALYTICS TO SCHEDULE, SUBMIT OR MONITOR PROCESSES OR REPORTS' [patent_app_type] => utility [patent_app_number] => 12/339673 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6559 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20100162246.pdf [firstpage_image] =>[orig_patent_app_number] => 12339673 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339673
Executing a batch process on a repository of information based on an analysis of the information in the repository Dec 18, 2008 Issued
Array ( [id] => 6303098 [patent_doc_number] => 20100162262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Split Scheduler' [patent_app_type] => utility [patent_app_number] => 12/338769 [patent_app_country] => US [patent_app_date] => 2008-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20100162262.pdf [firstpage_image] =>[orig_patent_app_number] => 12338769 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/338769
Processor employing split scheduler in which near, low latency operation dependencies are tracked separate from other operation dependencies Dec 17, 2008 Issued
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