Search

Kendra Ly

Examiner (ID: 3805, Phone: (571)270-7060 , Office: P/1747 )

Most Active Art Unit
1749
Art Unit(s)
1749, 1747
Total Applications
657
Issued Applications
363
Pending Applications
73
Abandoned Applications
240

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10377665 [patent_doc_number] => 20150262672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/475490 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475490 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475490
Nonvolatile semiconductor memory device Sep 1, 2014 Issued
Array ( [id] => 10590373 [patent_doc_number] => 09311993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/474040 [patent_app_country] => US [patent_app_date] => 2014-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 12087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474040 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/474040
Nonvolatile semiconductor memory device Aug 28, 2014 Issued
Array ( [id] => 10709742 [patent_doc_number] => 20160055889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'LOW POWER DOUBLE PUMPED MULTI-PORT REGISTER FILE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/467376 [patent_app_country] => US [patent_app_date] => 2014-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9928 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467376 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467376
Low power double pumped multi-port register file architecture Aug 24, 2014 Issued
Array ( [id] => 10709769 [patent_doc_number] => 20160055916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'Operational Amplifier Methods for Charging of Sense Amplifier Internal Nodes' [patent_app_type] => utility [patent_app_number] => 14/467770 [patent_app_country] => US [patent_app_date] => 2014-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 18682 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467770
Operational amplifier methods for charging of sense amplifier internal nodes Aug 24, 2014 Issued
Array ( [id] => 10590406 [patent_doc_number] => 09312026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Zoned erase verify in three dimensional nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 14/466786 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 10870 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14466786 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/466786
Zoned erase verify in three dimensional nonvolatile memory Aug 21, 2014 Issued
Array ( [id] => 10624211 [patent_doc_number] => 09343159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Avoiding unintentional program or erase of a select gate transistor' [patent_app_type] => utility [patent_app_number] => 14/465244 [patent_app_country] => US [patent_app_date] => 2014-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 12965 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14465244 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/465244
Avoiding unintentional program or erase of a select gate transistor Aug 20, 2014 Issued
Array ( [id] => 10583524 [patent_doc_number] => 09305648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Techniques for programming of select gates in NAND memory' [patent_app_type] => utility [patent_app_number] => 14/464122 [patent_app_country] => US [patent_app_date] => 2014-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 8555 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464122 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464122
Techniques for programming of select gates in NAND memory Aug 19, 2014 Issued
Array ( [id] => 10979780 [patent_doc_number] => 20160176724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'REMOTE MANAGED BALLAST WATER TREATMENT SYSTEM USING AUGMENTED REALITY' [patent_app_type] => utility [patent_app_number] => 14/890134 [patent_app_country] => US [patent_app_date] => 2014-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3712 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14890134 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/890134
Remote managed ballast water treatment system using augmented reality Aug 18, 2014 Issued
Array ( [id] => 10703035 [patent_doc_number] => 20160049182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'MEMORY ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/461156 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461156 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/461156
Memory architecture having first and second voltages Aug 14, 2014 Issued
Array ( [id] => 11333517 [patent_doc_number] => 09524765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Differential magnetic tunnel junction pair including a sense layer with a high coercivity portion' [patent_app_type] => utility [patent_app_number] => 14/460626 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11209 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460626 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/460626
Differential magnetic tunnel junction pair including a sense layer with a high coercivity portion Aug 14, 2014 Issued
Array ( [id] => 10178684 [patent_doc_number] => 09208895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Cell current control through power supply' [patent_app_type] => utility [patent_app_number] => 14/459790 [patent_app_country] => US [patent_app_date] => 2014-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 16927 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14459790 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/459790
Cell current control through power supply Aug 13, 2014 Issued
Array ( [id] => 10377673 [patent_doc_number] => 20150262680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/458430 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8203 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458430 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/458430
Nonvolatile semiconductor memory device and control method thereof Aug 12, 2014 Issued
Array ( [id] => 10093037 [patent_doc_number] => 09129866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Memory device and manufacturing method the same' [patent_app_type] => utility [patent_app_number] => 14/454113 [patent_app_country] => US [patent_app_date] => 2014-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9528 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14454113 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/454113
Memory device and manufacturing method the same Aug 6, 2014 Issued
Array ( [id] => 11483092 [patent_doc_number] => 09589642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Level shifter and decoder for memory' [patent_app_type] => utility [patent_app_number] => 14/454510 [patent_app_country] => US [patent_app_date] => 2014-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 6778 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14454510 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/454510
Level shifter and decoder for memory Aug 6, 2014 Issued
Array ( [id] => 10099961 [patent_doc_number] => 09136280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Semiconductor device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 14/328818 [patent_app_country] => US [patent_app_date] => 2014-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 24713 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328818 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328818
Semiconductor device and driving method thereof Jul 10, 2014 Issued
Array ( [id] => 10919869 [patent_doc_number] => 20140322888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/328056 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7197 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328056 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328056
Variable resistance memory device and method of fabricating the same Jul 9, 2014 Issued
Array ( [id] => 10918187 [patent_doc_number] => 20140321206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'READING MEMORY CELL HISTORY DURING PROGRAM OPERATION FOR ADAPTIVE PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 14/325183 [patent_app_country] => US [patent_app_date] => 2014-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14325183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/325183
Reading memory cell history during program operation for adaptive programming Jul 6, 2014 Issued
Array ( [id] => 10918182 [patent_doc_number] => 20140321201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'DEVICES AND METHODS TO PROGRAM A MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/325075 [patent_app_country] => US [patent_app_date] => 2014-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5911 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14325075 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/325075
Devices and methods to program a memory cell Jul 6, 2014 Issued
Array ( [id] => 12313914 [patent_doc_number] => 09941023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Post package repair (PPR) data in non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/313751 [patent_app_country] => US [patent_app_date] => 2014-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6387 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15313751 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/313751
Post package repair (PPR) data in non-volatile memory Jun 25, 2014 Issued
Array ( [id] => 10624221 [patent_doc_number] => 09343170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Word-line inter-cell interference detector in flash system' [patent_app_type] => utility [patent_app_number] => 14/313971 [patent_app_country] => US [patent_app_date] => 2014-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 10846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14313971 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/313971
Word-line inter-cell interference detector in flash system Jun 23, 2014 Issued
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