Kendra Ly

Array ( [id] => 10732781 [patent_doc_number] => 20160078930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'REPRESENTING DATA USING A GROUP OF MULTILEVEL MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 14/784136 [patent_app_country] => US [patent_app_date] => 2013-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6251 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14784136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9040029 [patent_doc_number] => 20130242667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'NON-VOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/867716 [patent_app_country] => US [patent_app_date] => 2013-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 16498 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13867716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9577050 [patent_doc_number] => 08767477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/864660 [patent_app_country] => US [patent_app_date] => 2013-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 8608 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13864660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9929890 [patent_doc_number] => 20150078082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'Non-volatile Memory Device With Current Injection Sensing Amplifier' [patent_app_type] => utility [patent_app_number] => 14/386816 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4512 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14386816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10570020 [patent_doc_number] => 09293196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Memory cells, memory systems, and memory programming methods' [patent_app_type] => utility [patent_app_number] => 13/837911 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7507 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13837911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9929888 [patent_doc_number] => 20150078081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'Trimmable Reference Generator For Sense Amplifier' [patent_app_type] => utility [patent_app_number] => 14/386814 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2614 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14386814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9733431 [patent_doc_number] => 20140269140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'NON-VOLATILE MEMORY (NVM) WITH WORD LINE DRIVER/DECODER USING A CHARGE PUMP VOLTAGE' [patent_app_type] => utility [patent_app_number] => 13/826958 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10638190 [patent_doc_number] => 09355698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Memory and logic device and methods for performing thereof' [patent_app_type] => utility [patent_app_number] => 14/385006 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 8149 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14385006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9924641 [patent_doc_number] => 08982615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Decoding architecture and method for phase change non-volatile memory devices' [patent_app_type] => utility [patent_app_number] => 13/780280 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 10665 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 407 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9894336 [patent_doc_number] => 20150049535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/388436 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8486 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14388436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8894067 [patent_doc_number] => 20130167251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'METHOD OF USING MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 13/770881 [patent_app_country] => US [patent_app_date] => 2013-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7707 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10125370 [patent_doc_number] => 09159738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/387908 [patent_app_country] => US [patent_app_date] => 2013-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 19861 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14387908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10899814 [patent_doc_number] => 08923043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Memory device using flag cells and system using the memory device' [patent_app_type] => utility [patent_app_number] => 13/762737 [patent_app_country] => US [patent_app_date] => 2013-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5580 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9633443 [patent_doc_number] => 20140211551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'MRAM SELF-REPAIR WITH BIST LOGIC' [patent_app_type] => utility [patent_app_number] => 13/756136 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7599 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13756136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9475766 [patent_doc_number] => 20140133229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'BIT LINE RESISTANCE COMPENSATION' [patent_app_type] => utility [patent_app_number] => 13/755894 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 20329 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13755894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9884351 [patent_doc_number] => 08971128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Adaptive initial program voltage for non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/756387 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 12535 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13756387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9959634 [patent_doc_number] => 09007848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Volatile memory with a decreased consumption and an improved storage capacity' [patent_app_type] => utility [patent_app_number] => 13/754427 [patent_app_country] => US [patent_app_date] => 2013-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13754427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9080289 [patent_doc_number] => 20130265819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'EIGHT TRANSISTOR SOFT ERROR ROBUST STORAGE CELL' [patent_app_type] => utility [patent_app_number] => 13/751763 [patent_app_country] => US [patent_app_date] => 2013-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4303 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13751763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10544316 [patent_doc_number] => 09269448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Generating soft read values using multiple reads and/or bins' [patent_app_type] => utility [patent_app_number] => 13/747329 [patent_app_country] => US [patent_app_date] => 2013-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9479 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13747329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8915175 [patent_doc_number] => 20130176800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'MEMORY CONTROLLER HAVING A WRITE-TIMING CALIBRATION MODE' [patent_app_type] => utility [patent_app_number] => 13/741255 [patent_app_country] => US [patent_app_date] => 2013-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11712 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741255 [rel_patent_id] =>[rel_patent_doc_number] =>)