
Kendra Ly
Examiner (ID: 3805, Phone: (571)270-7060 , Office: P/1747 )
| Most Active Art Unit | 1749 |
| Art Unit(s) | 1749, 1747 |
| Total Applications | 657 |
| Issued Applications | 363 |
| Pending Applications | 73 |
| Abandoned Applications | 240 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9168206
[patent_doc_number] => 08593890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-26
[patent_title] => 'Implementing supply and source write assist for SRAM arrays'
[patent_app_type] => utility
[patent_app_number] => 13/455394
[patent_app_country] => US
[patent_app_date] => 2012-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4243
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455394
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/455394 | Implementing supply and source write assist for SRAM arrays | Apr 24, 2012 | Issued |
Array
(
[id] => 9168184
[patent_doc_number] => 08593868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-26
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/453440
[patent_app_country] => US
[patent_app_date] => 2012-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7866
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453440
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/453440 | Semiconductor memory device | Apr 22, 2012 | Issued |
Array
(
[id] => 9155094
[patent_doc_number] => 08588004
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-19
[patent_title] => 'Memory device having multi-port memory cell with expandable port configuration'
[patent_app_type] => utility
[patent_app_number] => 13/445270
[patent_app_country] => US
[patent_app_date] => 2012-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5750
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13445270
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/445270 | Memory device having multi-port memory cell with expandable port configuration | Apr 11, 2012 | Issued |
Array
(
[id] => 8356555
[patent_doc_number] => 20120211718
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-23
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/440225
[patent_app_country] => US
[patent_app_date] => 2012-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 5106
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440225
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/440225 | Semiconductor storage device | Apr 4, 2012 | Issued |
Array
(
[id] => 9403170
[patent_doc_number] => 08693230
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-08
[patent_title] => 'Semiconductor device including plural chips stacked to each other'
[patent_app_type] => utility
[patent_app_number] => 13/436592
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 8194
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436592
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/436592 | Semiconductor device including plural chips stacked to each other | Mar 29, 2012 | Issued |
Array
(
[id] => 8428540
[patent_doc_number] => 20120250416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/433956
[patent_app_country] => US
[patent_app_date] => 2012-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4368
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13433956
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/433956 | SEMICONDUCTOR MEMORY DEVICE | Mar 28, 2012 | Abandoned |
Array
(
[id] => 9067034
[patent_doc_number] => 20130258790
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'MEMORY WITH REDUNDANT SENSE AMPLIFIER'
[patent_app_type] => utility
[patent_app_number] => 13/431424
[patent_app_country] => US
[patent_app_date] => 2012-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5407
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431424
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/431424 | Memory with redundant sense amplifier | Mar 26, 2012 | Issued |
Array
(
[id] => 8605221
[patent_doc_number] => 20130010532
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-10
[patent_title] => 'MAGNETORESISTIVE ELEMENT AND MAGNETIC MEMORY USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/427732
[patent_app_country] => US
[patent_app_date] => 2012-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7494
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13427732
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/427732 | Magnetoresistive element and magnetic memory using the same | Mar 21, 2012 | Issued |
Array
(
[id] => 8521270
[patent_doc_number] => 20120320678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/424724
[patent_app_country] => US
[patent_app_date] => 2012-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 9596
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424724
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/424724 | Non-volatile semiconductor memory device | Mar 19, 2012 | Issued |
Array
(
[id] => 9415214
[patent_doc_number] => 08699259
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Non-volatile storage system using opposite polarity programming signals for MIM memory cell'
[patent_app_type] => utility
[patent_app_number] => 13/410848
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 29
[patent_no_of_words] => 12246
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410848
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410848 | Non-volatile storage system using opposite polarity programming signals for MIM memory cell | Mar 1, 2012 | Issued |
Array
(
[id] => 8263669
[patent_doc_number] => 20120163100
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-28
[patent_title] => 'AUTO-PRECHARGE SIGNAL GENERATOR'
[patent_app_type] => utility
[patent_app_number] => 13/410859
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5241
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410859
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410859 | Auto-precharge signal generator | Mar 1, 2012 | Issued |
Array
(
[id] => 9168201
[patent_doc_number] => 08593885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-26
[patent_title] => 'Staggered mode transitions in a segmented interface'
[patent_app_type] => utility
[patent_app_number] => 13/411402
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 31
[patent_no_of_words] => 25357
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13411402
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/411402 | Staggered mode transitions in a segmented interface | Mar 1, 2012 | Issued |
Array
(
[id] => 8970185
[patent_doc_number] => 08509007
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-13
[patent_title] => 'Hybrid read scheme for multi-level data'
[patent_app_type] => utility
[patent_app_number] => 13/405523
[patent_app_country] => US
[patent_app_date] => 2012-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 4032
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13405523
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/405523 | Hybrid read scheme for multi-level data | Feb 26, 2012 | Issued |
Array
(
[id] => 8380786
[patent_doc_number] => 20120224419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-06
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/406012
[patent_app_country] => US
[patent_app_date] => 2012-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6249
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406012
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/406012 | SEMICONDUCTOR STORAGE DEVICE | Feb 26, 2012 | Abandoned |
Array
(
[id] => 8238929
[patent_doc_number] => 20120147658
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'SYSTEM OF MEASURING A RESISTANCE OF A RESISTIVE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/399469
[patent_app_country] => US
[patent_app_date] => 2012-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6315
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13399469
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/399469 | SYSTEM OF MEASURING A RESISTANCE OF A RESISTIVE MEMORY DEVICE | Feb 16, 2012 | Abandoned |
Array
(
[id] => 8357114
[patent_doc_number] => 20120212272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-23
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING PLURAL PENETRATION ELECTRODES PENETRATING THROUGH SEMICONDUCTOR SUBSTRATE AND TESTING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/398702
[patent_app_country] => US
[patent_app_date] => 2012-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 18156
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398702
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/398702 | Semiconductor device having plural penetration electrodes penetrating through semiconductor substrate and testing method thereof | Feb 15, 2012 | Issued |
Array
(
[id] => 8798311
[patent_doc_number] => 08437189
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-05-07
[patent_title] => 'Method and apparatus for storing data in a NAND flash memory'
[patent_app_type] => utility
[patent_app_number] => 13/397504
[patent_app_country] => US
[patent_app_date] => 2012-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5278
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397504
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/397504 | Method and apparatus for storing data in a NAND flash memory | Feb 14, 2012 | Issued |
Array
(
[id] => 8962151
[patent_doc_number] => 20130201753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-08
[patent_title] => 'IMPLEMENTING LOW POWER WRITE DISABLED LOCAL EVALUATION FOR SRAM'
[patent_app_type] => utility
[patent_app_number] => 13/368918
[patent_app_country] => US
[patent_app_date] => 2012-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3255
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368918
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/368918 | Implementing low power write disabled local evaluation for SRAM | Feb 7, 2012 | Issued |
Array
(
[id] => 8219435
[patent_doc_number] => 20120134205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'OPERATING METHOD FOR MEMORY UNIT'
[patent_app_type] => utility
[patent_app_number] => 13/366370
[patent_app_country] => US
[patent_app_date] => 2012-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6477
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366370
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/366370 | Operating method for non-volatile memory unit | Feb 5, 2012 | Issued |
Array
(
[id] => 8221346
[patent_doc_number] => 20120135548
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/366329
[patent_app_country] => US
[patent_app_date] => 2012-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 10160
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366329
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/366329 | Method of manufacturing non-volatile memory module | Feb 4, 2012 | Issued |