Kendra Ly

Array ( [id] => 8238938 [patent_doc_number] => 20120147667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'VARIABLE RESISTANCE MEMORY PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 12/967592 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9692 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12967592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8092705 [patent_doc_number] => 20120081961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'NONVOLATILE MEMORY APPARATUS CAPABLE OF REDUCING CURRENT CONSUMPTION AND RELATED DRIVING METHOD' [patent_app_type] => utility [patent_app_number] => 12/968192 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5709 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20120081961.pdf [firstpage_image] =>[orig_patent_app_number] => 12968192 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6029416 [patent_doc_number] => 20110080782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 12/967743 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20110080782.pdf [firstpage_image] =>[orig_patent_app_number] => 12967743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6029382 [patent_doc_number] => 20110080768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 12/967802 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20110080768.pdf [firstpage_image] =>[orig_patent_app_number] => 12967802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8008321 [patent_doc_number] => 08085569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Semiconductor memory device, and multi-chip package and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/968087 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3565 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/085/08085569.pdf [firstpage_image] =>[orig_patent_app_number] => 12968087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6078241 [patent_doc_number] => 20110141838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/966610 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5552 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20110141838.pdf [firstpage_image] =>[orig_patent_app_number] => 12966610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8761793 [patent_doc_number] => 08422323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Multi-bit test circuit of semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/966650 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3465 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12966650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8179953 [patent_doc_number] => 08179730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Semiconductor device and semiconductor memory tester' [patent_app_type] => utility [patent_app_number] => 12/963247 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 29 [patent_no_of_words] => 12609 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/179/08179730.pdf [firstpage_image] =>[orig_patent_app_number] => 12963247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8234113 [patent_doc_number] => 08199562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Memory cell with enhanced read and write sense margins' [patent_app_type] => utility [patent_app_number] => 12/961240 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4142 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/199/08199562.pdf [firstpage_image] =>[orig_patent_app_number] => 12961240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8739726 [patent_doc_number] => 08411506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Non-volatile memory and operating method of memory cell' [patent_app_type] => utility [patent_app_number] => 12/949076 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12949076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6140541 [patent_doc_number] => 20110128799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'LEVEL SHIFTING CIRCUIT AND NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/949502 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5183 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128799.pdf [firstpage_image] =>[orig_patent_app_number] => 12949502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8739732 [patent_doc_number] => 08411512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/948936 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2832 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12948936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8207710 [patent_doc_number] => 20120127807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 12/949728 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20120127807.pdf [firstpage_image] =>[orig_patent_app_number] => 12949728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8207710 [patent_doc_number] => 20120127807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 12/949728 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20120127807.pdf [firstpage_image] =>[orig_patent_app_number] => 12949728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8471307 [patent_doc_number] => 08300496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Semiconductor memory apparatus and test method thereof' [patent_app_type] => utility [patent_app_number] => 12/948874 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6404 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12948874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8676980 [patent_doc_number] => 08385102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Alternating bipolar forming voltage for resistivity-switching elements' [patent_app_type] => utility [patent_app_number] => 12/949590 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 10158 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12949590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8207710 [patent_doc_number] => 20120127807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 12/949728 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20120127807.pdf [firstpage_image] =>[orig_patent_app_number] => 12949728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8207710 [patent_doc_number] => 20120127807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 12/949728 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20120127807.pdf [firstpage_image] =>[orig_patent_app_number] => 12949728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8008379 [patent_doc_number] => 08085598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/944358 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 17281 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/085/08085598.pdf [firstpage_image] =>[orig_patent_app_number] => 12944358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10899844 [patent_doc_number] => 08923073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Storage element reading using ring oscillator' [patent_app_type] => utility [patent_app_number] => 13/823826 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3978 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13823826 [rel_patent_id] =>[rel_patent_doc_number] =>)