Search

Kenneth Bartley

Examiner (ID: 14904)

Most Active Art Unit
3693
Art Unit(s)
3626, 3684, 3693
Total Applications
741
Issued Applications
253
Pending Applications
87
Abandoned Applications
413

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5531221 [patent_doc_number] => 20090231009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'HIGH-RESOLUTION LOW-INTERCONNECT PHASE ROTATOR' [patent_app_type] => utility [patent_app_number] => 12/049677 [patent_app_country] => US [patent_app_date] => 2008-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231009.pdf [firstpage_image] =>[orig_patent_app_number] => 12049677 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/049677
High-resolution low-interconnect phase rotator Mar 16, 2008 Issued
Array ( [id] => 4737682 [patent_doc_number] => 20080231334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'CLOCK SIGNAL TRANSMISSION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/048960 [patent_app_country] => US [patent_app_date] => 2008-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5246 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20080231334.pdf [firstpage_image] =>[orig_patent_app_number] => 12048960 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/048960
Clock signal transmission circuit Mar 13, 2008 Issued
Array ( [id] => 5531237 [patent_doc_number] => 20090231025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Method and Apparatus for Extending the Lifetime of a Semiconductor Chip' [patent_app_type] => utility [patent_app_number] => 12/045974 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3437 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231025.pdf [firstpage_image] =>[orig_patent_app_number] => 12045974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045974
Method and apparatus for extending the lifetime of a semiconductor chip Mar 10, 2008 Issued
Array ( [id] => 4817493 [patent_doc_number] => 20080224752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'INTERNAL CLOCK GENERATOR, SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/045125 [patent_app_country] => US [patent_app_date] => 2008-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4298 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224752.pdf [firstpage_image] =>[orig_patent_app_number] => 12045125 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045125
Internal clock generator, system and method Mar 9, 2008 Issued
Array ( [id] => 4708701 [patent_doc_number] => 20080297227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'INTEGRATED CIRCUIT SYSTEM FOR ANALOG SWITCHING' [patent_app_type] => utility [patent_app_number] => 12/044847 [patent_app_country] => US [patent_app_date] => 2008-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20080297227.pdf [firstpage_image] =>[orig_patent_app_number] => 12044847 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/044847
INTEGRATED CIRCUIT SYSTEM FOR ANALOG SWITCHING Mar 6, 2008 Abandoned
Array ( [id] => 6306012 [patent_doc_number] => 20100109710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SAMPLER BLOCKER PROTECTED AGAINST SWITCHING PARASITES' [patent_app_type] => utility [patent_app_number] => 12/530583 [patent_app_country] => US [patent_app_date] => 2008-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3726 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109710.pdf [firstpage_image] =>[orig_patent_app_number] => 12530583 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/530583
Sampler blocker protected against switching parasites Mar 2, 2008 Issued
Array ( [id] => 5537258 [patent_doc_number] => 20090219063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICES ON A PLURALITY OF CLOCK SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/040473 [patent_app_country] => US [patent_app_date] => 2008-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5232 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20090219063.pdf [firstpage_image] =>[orig_patent_app_number] => 12040473 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/040473
Methods and articles of manufacture for operating electronic devices on a plurality of clock signals Feb 28, 2008 Issued
Array ( [id] => 4580401 [patent_doc_number] => 07825697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Signal detection circuit with deglitch and method thereof' [patent_app_type] => utility [patent_app_number] => 12/040094 [patent_app_country] => US [patent_app_date] => 2008-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3115 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/825/07825697.pdf [firstpage_image] =>[orig_patent_app_number] => 12040094 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/040094
Signal detection circuit with deglitch and method thereof Feb 28, 2008 Issued
Array ( [id] => 5512539 [patent_doc_number] => 20090212843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/036823 [patent_app_country] => US [patent_app_date] => 2008-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5482 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20090212843.pdf [firstpage_image] =>[orig_patent_app_number] => 12036823 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/036823
SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD Feb 24, 2008 Abandoned
Array ( [id] => 5450366 [patent_doc_number] => 20090066402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'GATE DRIVE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/027616 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15609 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20090066402.pdf [firstpage_image] =>[orig_patent_app_number] => 12027616 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027616
Gate drive circuit Feb 6, 2008 Issued
Array ( [id] => 5353396 [patent_doc_number] => 20090184740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'Phase-Locked Loop Circuit with Accelerated Frequency Acquisition' [patent_app_type] => utility [patent_app_number] => 12/017052 [patent_app_country] => US [patent_app_date] => 2008-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3841 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20090184740.pdf [firstpage_image] =>[orig_patent_app_number] => 12017052 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017052
Phase-Locked Loop Circuit with Accelerated Frequency Acquisition Jan 20, 2008 Abandoned
Array ( [id] => 5439733 [patent_doc_number] => 20090091372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'SYSTEM-ON-A-CHIP AND POWER GATING CIRCUIT THEREOF' [patent_app_type] => utility [patent_app_number] => 11/964012 [patent_app_country] => US [patent_app_date] => 2007-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10711 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20090091372.pdf [firstpage_image] =>[orig_patent_app_number] => 11964012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/964012
System-on-a-chip and power gating circuit thereof Dec 24, 2007 Issued
Array ( [id] => 4466237 [patent_doc_number] => 07936191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Start-up reset circuit and related method' [patent_app_type] => utility [patent_app_number] => 11/963857 [patent_app_country] => US [patent_app_date] => 2007-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2433 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/936/07936191.pdf [firstpage_image] =>[orig_patent_app_number] => 11963857 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963857
Start-up reset circuit and related method Dec 23, 2007 Issued
Array ( [id] => 4577036 [patent_doc_number] => 07859319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Setup/hold time control circuit' [patent_app_type] => utility [patent_app_number] => 11/963977 [patent_app_country] => US [patent_app_date] => 2007-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5314 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859319.pdf [firstpage_image] =>[orig_patent_app_number] => 11963977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963977
Setup/hold time control circuit Dec 23, 2007 Issued
Array ( [id] => 5499815 [patent_doc_number] => 20090160503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'TRIANGLE WAVE GENERATOR AND SPREAD SPECTRUM CONTROL CIRCUIT THEREOF' [patent_app_type] => utility [patent_app_number] => 11/963856 [patent_app_country] => US [patent_app_date] => 2007-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4090 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160503.pdf [firstpage_image] =>[orig_patent_app_number] => 11963856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963856
Triangle wave generator and spread spectrum control circuit thereof Dec 23, 2007 Issued
Array ( [id] => 5499838 [patent_doc_number] => 20090160526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'DIGITAL DIVIDER FOR LOW VOLTAGE LOGEN' [patent_app_type] => utility [patent_app_number] => 11/963816 [patent_app_country] => US [patent_app_date] => 2007-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160526.pdf [firstpage_image] =>[orig_patent_app_number] => 11963816 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963816
Digital divider for low voltage LOGEN Dec 21, 2007 Issued
Array ( [id] => 93560 [patent_doc_number] => 07733143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Duty cycle correction circuit for high-speed clock signals' [patent_app_type] => utility [patent_app_number] => 11/962886 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3233 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733143.pdf [firstpage_image] =>[orig_patent_app_number] => 11962886 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962886
Duty cycle correction circuit for high-speed clock signals Dec 20, 2007 Issued
Array ( [id] => 5499801 [patent_doc_number] => 20090160489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'METHOD AND APPARATUS FOR TIME-DIFFERENTIAL COMPARISON OF AN ANALOG SIGNAL' [patent_app_type] => utility [patent_app_number] => 11/963645 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3167 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160489.pdf [firstpage_image] =>[orig_patent_app_number] => 11963645 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963645
Method and apparatus for time-differential comparison of an analog signal Dec 20, 2007 Issued
Array ( [id] => 4588113 [patent_doc_number] => 07852139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Apparatus for generating internal voltage in semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/962940 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3257 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852139.pdf [firstpage_image] =>[orig_patent_app_number] => 11962940 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962940
Apparatus for generating internal voltage in semiconductor integrated circuit Dec 20, 2007 Issued
Array ( [id] => 197915 [patent_doc_number] => 07639063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-29 [patent_title] => 'Circuit for turning on motherboard' [patent_app_type] => utility [patent_app_number] => 11/960741 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1059 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/639/07639063.pdf [firstpage_image] =>[orig_patent_app_number] => 11960741 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/960741
Circuit for turning on motherboard Dec 19, 2007 Issued
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