Kenneth J. Hansen

Array ( [id] => 4395259 [patent_doc_number] => 06297140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Method to plate C4 to copper stud' [patent_app_type] => 1 [patent_app_number] => 9/389232 [patent_app_country] => US [patent_app_date] => 1999-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3875 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297140.pdf [firstpage_image] =>[orig_patent_app_number] => 389232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4286540 [patent_doc_number] => 06211057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Method for manufacturing arch air gap in multilevel interconnection' [patent_app_type] => 1 [patent_app_number] => 9/389887 [patent_app_country] => US [patent_app_date] => 1999-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2689 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211057.pdf [firstpage_image] =>[orig_patent_app_number] => 389887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408786 [patent_doc_number] => 06300240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Method for forming bottom anti-reflective coating (BARC)' [patent_app_type] => 1 [patent_app_number] => 9/387730 [patent_app_country] => US [patent_app_date] => 1999-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3248 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300240.pdf [firstpage_image] =>[orig_patent_app_number] => 387730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302991 [patent_doc_number] => 06251806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Method to improve the roughness of metal deposition on low-k material' [patent_app_type] => 1 [patent_app_number] => 9/373251 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4623 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/251/06251806.pdf [firstpage_image] =>[orig_patent_app_number] => 373251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4417572 [patent_doc_number] => 06194316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Method for forming CU-thin film' [patent_app_type] => 1 [patent_app_number] => 9/368901 [patent_app_country] => US [patent_app_date] => 1999-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3147 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194316.pdf [firstpage_image] =>[orig_patent_app_number] => 368901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4294496 [patent_doc_number] => 06184123 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method to prevent delamination of spin-on-glass and plasma nitride layers using ion implantation' [patent_app_type] => 1 [patent_app_number] => 9/365982 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184123.pdf [firstpage_image] =>[orig_patent_app_number] => 365982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4381279 [patent_doc_number] => 06261914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Process for improving local uniformity of chemical mechanical polishing using a self-aligned polish rate enhancement layer' [patent_app_type] => 1 [patent_app_number] => 9/361961 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 3716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/261/06261914.pdf [firstpage_image] =>[orig_patent_app_number] => 361961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7636585 [patent_doc_number] => 06380070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Semiconductor device having a dual damascene interconnect structure and method for manufacturing same' [patent_app_type] => B1 [patent_app_number] => 09/359873 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 2207 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380070.pdf [firstpage_image] =>[orig_patent_app_number] => 09359873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191522 [patent_doc_number] => 06130146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'In-situ nitride and oxynitride deposition process in the same chamber' [patent_app_type] => 1 [patent_app_number] => 9/359893 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1934 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130146.pdf [firstpage_image] =>[orig_patent_app_number] => 359893 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4247132 [patent_doc_number] => 06221734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method of reducing CMP dishing effect' [patent_app_type] => 1 [patent_app_number] => 9/354622 [patent_app_country] => US [patent_app_date] => 1999-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1537 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221734.pdf [firstpage_image] =>[orig_patent_app_number] => 354622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4183577 [patent_doc_number] => 06159837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/354271 [patent_app_country] => US [patent_app_date] => 1999-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4767 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159837.pdf [firstpage_image] =>[orig_patent_app_number] => 354271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4302374 [patent_doc_number] => 06251765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Manufacturing metal dip solder bumps for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/350041 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1914 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/251/06251765.pdf [firstpage_image] =>[orig_patent_app_number] => 350041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4325283 [patent_doc_number] => 06329282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Method of improving the texture of aluminum metallization for tungsten etch back processing' [patent_app_type] => 1 [patent_app_number] => 9/349624 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2218 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329282.pdf [firstpage_image] =>[orig_patent_app_number] => 349624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4319149 [patent_doc_number] => 06248665 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Delamination improvement between Cu and dielectrics for damascene process' [patent_app_type] => 1 [patent_app_number] => 9/347912 [patent_app_country] => US [patent_app_date] => 1999-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3799 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/248/06248665.pdf [firstpage_image] =>[orig_patent_app_number] => 347912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191648 [patent_doc_number] => 06130155 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Method of forming metal lines in an integrated circuit having reduced reaction with an anti-reflection coating' [patent_app_type] => 1 [patent_app_number] => 9/347171 [patent_app_country] => US [patent_app_date] => 1999-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 966 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130155.pdf [firstpage_image] =>[orig_patent_app_number] => 347171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4310836 [patent_doc_number] => 06316358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Method for fabricating an integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/346271 [patent_app_country] => US [patent_app_date] => 1999-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2900 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316358.pdf [firstpage_image] =>[orig_patent_app_number] => 346271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4405174 [patent_doc_number] => 06271121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Process for chemical vapor deposition of tungsten onto a titanium nitride substrate surface' [patent_app_type] => 1 [patent_app_number] => 9/345051 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6708 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271121.pdf [firstpage_image] =>[orig_patent_app_number] => 345051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4357478 [patent_doc_number] => 06174802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Method for fabricating a self aligned contact which eliminates the key hole problem using a two step contact deposition' [patent_app_type] => 1 [patent_app_number] => 9/342042 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 2479 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/174/06174802.pdf [firstpage_image] =>[orig_patent_app_number] => 342042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4188838 [patent_doc_number] => 06153511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Semiconductor device having a multilayered interconnection structure' [patent_app_type] => 1 [patent_app_number] => 9/344241 [patent_app_country] => US [patent_app_date] => 1999-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 4525 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153511.pdf [firstpage_image] =>[orig_patent_app_number] => 344241 [rel_patent_id] =>[rel_patent_doc_number] =>)