
Kenneth M. Lo
Supervisory Patent Examiner (ID: 18815, Phone: (571)272-9774 , Office: P/2121 )
| Most Active Art Unit | 2188 |
| Art Unit(s) | 2121, 2188, 2136, 2189, 2133, 2116 |
| Total Applications | 306 |
| Issued Applications | 139 |
| Pending Applications | 21 |
| Abandoned Applications | 151 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5548123
[patent_doc_number] => 20090158000
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'Computer System, Memory Management Method and Program Thereof'
[patent_app_type] => utility
[patent_app_number] => 11/909883
[patent_app_country] => US
[patent_app_date] => 2006-03-30
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[pdf_file] => publications/A1/0158/20090158000.pdf
[firstpage_image] =>[orig_patent_app_number] => 11909883
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/909883 | Computer system, memory management method and program thereof | Mar 29, 2006 | Issued |
Array
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[patent_doc_number] => 20060149918
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[patent_issue_date] => 2006-07-06
[patent_title] => 'Memory with modifiable address map'
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[firstpage_image] =>[orig_patent_app_number] => 11323473
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323473 | Memory with modifiable address map | Dec 29, 2005 | Abandoned |
Array
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[patent_title] => 'Performing direct cache access transactions based on a memory access data structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323262 | Performing direct cache access transactions based on a memory access data structure | Dec 29, 2005 | Issued |
Array
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[patent_title] => 'Performance reporting method considering storage configuration'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/312552 | Performance reporting method considering storage configuration | Dec 20, 2005 | Issued |
Array
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[patent_title] => 'Computer system, storage area allocation method, and management computer'
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Array
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[patent_title] => 'Partitioned shared cache'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/722520 | INTEGRATED CIRCUIT WITH IMPROVED DEVICE SECURITY | Dec 18, 2005 | Abandoned |
Array
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[patent_title] => 'Structures for the management of erase operations in non-volatile memories'
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Array
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Array
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[patent_title] => 'Missing store operation accelerator'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/267233 | Method and apparatus for partitioning a memory | Nov 2, 2005 | Abandoned |
Array
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[id] => 4614049
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Array
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Array
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Array
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Array
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