Search

Kenneth M. Lo

Supervisory Patent Examiner (ID: 9624, Phone: (571)272-9774 , Office: P/2121 )

Most Active Art Unit
2188
Art Unit(s)
2188, 2136, 2121, 2133, 2116, 2189
Total Applications
313
Issued Applications
146
Pending Applications
19
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5523093 [patent_doc_number] => 20090031074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Multi-level Cell Flash Memory and Method of Programming the Same' [patent_app_type] => utility [patent_app_number] => 12/177491 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3221 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20090031074.pdf [firstpage_image] =>[orig_patent_app_number] => 12177491 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177491
Multi-level Cell Flash Memory and Method of Programming the Same Jul 21, 2008 Abandoned
Array ( [id] => 5519815 [patent_doc_number] => 20090027796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'INFORMATION RECORDING DEVICE AND CONTROL METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/177250 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10200 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027796.pdf [firstpage_image] =>[orig_patent_app_number] => 12177250 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177250
INFORMATION RECORDING DEVICE AND CONTROL METHOD THEREFOR Jul 21, 2008 Abandoned
Array ( [id] => 7681109 [patent_doc_number] => 20100023699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'System and Method for Usage Analyzer of Subscriber Access to Communications Network' [patent_app_type] => utility [patent_app_number] => 12/177341 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20100023699.pdf [firstpage_image] =>[orig_patent_app_number] => 12177341 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177341
System and method for usage analyzer of subscriber access to communications network Jul 21, 2008 Issued
Array ( [id] => 6444455 [patent_doc_number] => 20100169572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'DATA STORAGE METHOD, APPARATUS AND SYSTEM FOR INTERRUPTED WRITE RECOVERY' [patent_app_type] => utility [patent_app_number] => 12/438019 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4427 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169572.pdf [firstpage_image] =>[orig_patent_app_number] => 12438019 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/438019
DATA STORAGE METHOD, APPARATUS AND SYSTEM FOR INTERRUPTED WRITE RECOVERY Jul 21, 2008 Abandoned
Array ( [id] => 4678182 [patent_doc_number] => 20080215813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'Storage system and storage management system' [patent_app_type] => utility [patent_app_number] => 12/149295 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10789 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20080215813.pdf [firstpage_image] =>[orig_patent_app_number] => 12149295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149295
Storage system and storage management system Apr 29, 2008 Issued
Array ( [id] => 6073551 [patent_doc_number] => 20110047339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND METHOD OF BACKING UP MEMORY IN SAID APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/098727 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5812 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047339.pdf [firstpage_image] =>[orig_patent_app_number] => 12098727 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/098727
Information processing apparatus and method of backing up memory in said apparatus Apr 6, 2008 Issued
Array ( [id] => 10194594 [patent_doc_number] => 09223504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Method and system for placement of logical data stores to minimize request response time' [patent_app_type] => utility [patent_app_number] => 12/056591 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5492 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12056591 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/056591
Method and system for placement of logical data stores to minimize request response time Mar 26, 2008 Issued
Array ( [id] => 5351437 [patent_doc_number] => 20090006798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Structure for Memory Chip for High Capacity Memory Subsystem Supporting Replication of Command Data' [patent_app_type] => utility [patent_app_number] => 12/052831 [patent_app_country] => US [patent_app_date] => 2008-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20090006798.pdf [firstpage_image] =>[orig_patent_app_number] => 12052831 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/052831
Structure for memory chip for high capacity memory subsystem supporting replication of command data Mar 20, 2008 Issued
Array ( [id] => 4741831 [patent_doc_number] => 20080235484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'Method and System for Host Memory Alignment' [patent_app_type] => utility [patent_app_number] => 12/052878 [patent_app_country] => US [patent_app_date] => 2008-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5133 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20080235484.pdf [firstpage_image] =>[orig_patent_app_number] => 12052878 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/052878
Method and System for Host Memory Alignment Mar 20, 2008 Abandoned
Array ( [id] => 7510349 [patent_doc_number] => 08037272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Structure for memory chip for high capacity memory subsystem supporting multiple speed bus' [patent_app_type] => utility [patent_app_number] => 12/053131 [patent_app_country] => US [patent_app_date] => 2008-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15584 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037272.pdf [firstpage_image] =>[orig_patent_app_number] => 12053131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/053131
Structure for memory chip for high capacity memory subsystem supporting multiple speed bus Mar 20, 2008 Issued
Array ( [id] => 7510308 [patent_doc_number] => 08037258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Structure for dual-mode memory chip for high capacity memory subsystem' [patent_app_type] => utility [patent_app_number] => 12/053185 [patent_app_country] => US [patent_app_date] => 2008-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15494 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037258.pdf [firstpage_image] =>[orig_patent_app_number] => 12053185 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/053185
Structure for dual-mode memory chip for high capacity memory subsystem Mar 20, 2008 Issued
Array ( [id] => 9169750 [patent_doc_number] => 08595443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Varying a data prefetch size based upon data usage' [patent_app_type] => utility [patent_app_number] => 12/024163 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3571 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12024163 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/024163
Varying a data prefetch size based upon data usage Jan 31, 2008 Issued
Array ( [id] => 5381346 [patent_doc_number] => 20090193185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'Method for accessing the physical memory of an operating system' [patent_app_type] => utility [patent_app_number] => 12/010380 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193185.pdf [firstpage_image] =>[orig_patent_app_number] => 12010380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/010380
Method for accessing the physical memory of an operating system Jan 23, 2008 Abandoned
Array ( [id] => 5587290 [patent_doc_number] => 20090106492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Storage apparatus and data storage method using the same' [patent_app_type] => utility [patent_app_number] => 12/007940 [patent_app_country] => US [patent_app_date] => 2008-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11325 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106492.pdf [firstpage_image] =>[orig_patent_app_number] => 12007940 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007940
Storage apparatus and data storage method using the same Jan 16, 2008 Issued
Array ( [id] => 5448008 [patent_doc_number] => 20090049234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'SOLID STATE MEMORY (SSM), COMPUTER SYSTEM INCLUDING AN SSM, AND METHOD OF OPERATING AN SSM' [patent_app_type] => utility [patent_app_number] => 12/015548 [patent_app_country] => US [patent_app_date] => 2008-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3981 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20090049234.pdf [firstpage_image] =>[orig_patent_app_number] => 12015548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/015548
SOLID STATE MEMORY (SSM), COMPUTER SYSTEM INCLUDING AN SSM, AND METHOD OF OPERATING AN SSM Jan 16, 2008 Abandoned
Array ( [id] => 7510243 [patent_doc_number] => 08037232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Data protection method for power failure and controller using the same' [patent_app_type] => utility [patent_app_number] => 12/015373 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6158 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037232.pdf [firstpage_image] =>[orig_patent_app_number] => 12015373 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/015373
Data protection method for power failure and controller using the same Jan 15, 2008 Issued
Array ( [id] => 8998046 [patent_doc_number] => 08521951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Content addressable memory augmented memory' [patent_app_type] => utility [patent_app_number] => 12/015430 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3428 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12015430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/015430
Content addressable memory augmented memory Jan 15, 2008 Issued
Array ( [id] => 5344298 [patent_doc_number] => 20090182948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'Caching Method and Apparatus for a Vertex Shader and Geometry Shader' [patent_app_type] => utility [patent_app_number] => 12/015112 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20090182948.pdf [firstpage_image] =>[orig_patent_app_number] => 12015112 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/015112
Caching method and apparatus for a vertex shader and geometry shader Jan 15, 2008 Issued
Array ( [id] => 5344327 [patent_doc_number] => 20090182977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'CASCADED MEMORY ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 12/015393 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2665 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20090182977.pdf [firstpage_image] =>[orig_patent_app_number] => 12015393 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/015393
CASCADED MEMORY ARRANGEMENT Jan 15, 2008 Abandoned
Array ( [id] => 4589616 [patent_doc_number] => 07831764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Storage system having plural flash memory drives and method for controlling data storage' [patent_app_type] => utility [patent_app_number] => 12/007329 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 11917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/831/07831764.pdf [firstpage_image] =>[orig_patent_app_number] => 12007329 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007329
Storage system having plural flash memory drives and method for controlling data storage Jan 8, 2008 Issued
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