Search

Kenneth R. Coulter

Examiner (ID: 8532, Phone: (571)272-3879 , Office: P/2445 )

Most Active Art Unit
2445
Art Unit(s)
2784, 2315, 2758, 2154, 2141, 2454, 2445, 2441
Total Applications
1777
Issued Applications
1404
Pending Applications
137
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
08/361290 DYNAMIC PRIORITY SWITCHING OF LOAD AND STORE BUFFERS IN SUPERSCALAR PROCESSOR Dec 21, 1994 Abandoned
08/360329 CONGESTION CONTROL METHOD IN ATM NETWORK BASED ON NODE QUEUE LENGTH Dec 20, 1994 Abandoned
Array ( [id] => 3667280 [patent_doc_number] => 05623624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Memory control architecture for high speed transfer options' [patent_app_type] => 1 [patent_app_number] => 8/360865 [patent_app_country] => US [patent_app_date] => 1994-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4234 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623624.pdf [firstpage_image] =>[orig_patent_app_number] => 360865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/360865
Memory control architecture for high speed transfer options Dec 19, 1994 Issued
Array ( [id] => 3760896 [patent_doc_number] => 05802272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Method and apparatus for tracing unpredictable execution flows in a trace buffer of a high-speed computer system' [patent_app_type] => 1 [patent_app_number] => 8/359252 [patent_app_country] => US [patent_app_date] => 1994-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6930 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802272.pdf [firstpage_image] =>[orig_patent_app_number] => 359252 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/359252
Method and apparatus for tracing unpredictable execution flows in a trace buffer of a high-speed computer system Dec 18, 1994 Issued
08/357898 APPARATUS AND METHOD FOR INSERTING AN ADDRESS IN A DATA STREAM THROUGH A FIFO BUFFER Dec 15, 1994 Abandoned
Array ( [id] => 3987748 [patent_doc_number] => 05922070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Pipelined data processing including program counter recycling' [patent_app_type] => 1 [patent_app_number] => 8/350640 [patent_app_country] => US [patent_app_date] => 1994-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 13037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/922/05922070.pdf [firstpage_image] =>[orig_patent_app_number] => 350640 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/350640
Pipelined data processing including program counter recycling Dec 6, 1994 Issued
Array ( [id] => 3638457 [patent_doc_number] => 05608895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Method for providing mouse functionality using either an internal or external mouse input device' [patent_app_type] => 1 [patent_app_number] => 8/346843 [patent_app_country] => US [patent_app_date] => 1994-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3410 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608895.pdf [firstpage_image] =>[orig_patent_app_number] => 346843 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/346843
Method for providing mouse functionality using either an internal or external mouse input device Nov 29, 1994 Issued
Array ( [id] => 3701278 [patent_doc_number] => 05696991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Method and device for parallel accessing data with optimal reading start' [patent_app_type] => 1 [patent_app_number] => 8/346094 [patent_app_country] => US [patent_app_date] => 1994-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2019 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696991.pdf [firstpage_image] =>[orig_patent_app_number] => 346094 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/346094
Method and device for parallel accessing data with optimal reading start Nov 28, 1994 Issued
08/336614 COMMON ERROR PROTECTION CODE FOR DATA STORED AS A COMPOSITE OF DIFFERENT DATA FORMATS Nov 8, 1994 Abandoned
08/335398 BUFFER CIRCUIT WITH CONTROL DEVICE TO DIRECTLY OUTPUT INPUT DATA OR TO OUTPUT INPUT DATA A WRITTEN IN STORAGE DEVICE Nov 2, 1994 Abandoned
Array ( [id] => 3901644 [patent_doc_number] => 05715460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Template based facility for formatting compiler output' [patent_app_type] => 1 [patent_app_number] => 8/332618 [patent_app_country] => US [patent_app_date] => 1994-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12713 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715460.pdf [firstpage_image] =>[orig_patent_app_number] => 332618 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/332618
Template based facility for formatting compiler output Oct 30, 1994 Issued
Array ( [id] => 3563514 [patent_doc_number] => 05538436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Two-part memory card socket connector and related interrupt handler' [patent_app_type] => 1 [patent_app_number] => 8/328545 [patent_app_country] => US [patent_app_date] => 1994-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2788 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/538/05538436.pdf [firstpage_image] =>[orig_patent_app_number] => 328545 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/328545
Two-part memory card socket connector and related interrupt handler Oct 24, 1994 Issued
08/328185 APPARATUS TO DYNAMICALLY CONTROL THE OUT-OF-ORDER EXECUTION OF LOAD/STORE INSTRUCTIONS IN A PROCESSOR CAPABLE OF DISPATCHING, ISSUING AND EXECUTING MULTIPLE INSTRUCTIONS IN A SINGLE PROCESSOR CYCLE Oct 23, 1994 Abandoned
Array ( [id] => 3752484 [patent_doc_number] => 05801715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Massively-parallel processor array with outputs from individual processors directly to an external device without involving other processors or a common physical carrier' [patent_app_type] => 1 [patent_app_number] => 8/323580 [patent_app_country] => US [patent_app_date] => 1994-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 7507 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801715.pdf [firstpage_image] =>[orig_patent_app_number] => 323580 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323580
Massively-parallel processor array with outputs from individual processors directly to an external device without involving other processors or a common physical carrier Oct 16, 1994 Issued
Array ( [id] => 3673389 [patent_doc_number] => 05649163 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Method of programming an asynchronous load storage device using a representation of a clear/preset storage device' [patent_app_type] => 1 [patent_app_number] => 8/319333 [patent_app_country] => US [patent_app_date] => 1994-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2796 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/649/05649163.pdf [firstpage_image] =>[orig_patent_app_number] => 319333 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/319333
Method of programming an asynchronous load storage device using a representation of a clear/preset storage device Oct 5, 1994 Issued
08/311303 ALGORITHMIC MODELING OF TES PROCESSES FOR SIMULATION ANALYSIS Sep 22, 1994 Abandoned
Array ( [id] => 3626577 [patent_doc_number] => 05511189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Data sorting apparatus capable of detecting completion of data sorting early and sorting method therefor' [patent_app_type] => 1 [patent_app_number] => 8/310745 [patent_app_country] => US [patent_app_date] => 1994-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9189 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511189.pdf [firstpage_image] =>[orig_patent_app_number] => 310745 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/310745
Data sorting apparatus capable of detecting completion of data sorting early and sorting method therefor Sep 21, 1994 Issued
Array ( [id] => 3562966 [patent_doc_number] => 05574676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Integer multiply instructions incorporating a subresult selection option' [patent_app_type] => 1 [patent_app_number] => 8/300278 [patent_app_country] => US [patent_app_date] => 1994-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3202 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574676.pdf [firstpage_image] =>[orig_patent_app_number] => 300278 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/300278
Integer multiply instructions incorporating a subresult selection option Sep 1, 1994 Issued
Array ( [id] => 3532795 [patent_doc_number] => 05530871 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Asynchronous input and output control system' [patent_app_type] => 1 [patent_app_number] => 8/294301 [patent_app_country] => US [patent_app_date] => 1994-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3172 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530871.pdf [firstpage_image] =>[orig_patent_app_number] => 294301 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/294301
Asynchronous input and output control system Aug 22, 1994 Issued
Array ( [id] => 3905160 [patent_doc_number] => 05778228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Method and system for transferring remote procedure calls and responses over a network' [patent_app_type] => 1 [patent_app_number] => 8/291228 [patent_app_country] => US [patent_app_date] => 1994-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6852 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778228.pdf [firstpage_image] =>[orig_patent_app_number] => 291228 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/291228
Method and system for transferring remote procedure calls and responses over a network Aug 15, 1994 Issued
Menu