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Kenneth R. Coulter

Examiner (ID: 8532, Phone: (571)272-3879 , Office: P/2445 )

Most Active Art Unit
2445
Art Unit(s)
2784, 2315, 2758, 2154, 2141, 2454, 2445, 2441
Total Applications
1777
Issued Applications
1404
Pending Applications
137
Abandoned Applications
258
Applications
StatisticsSubscription-Only

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4377688 [patent_doc_number] => 06219831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Device and method for converting computer programming languages' [patent_app_type] => 1 [patent_app_number] => 8/105839 [patent_app_country] => US [patent_app_date] => 1993-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 7850 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219831.pdf [firstpage_image] =>[orig_patent_app_number] => 105839 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/105839 		Device and method for converting computer programming languages Aug 11, 1993 Issued
08/103800 DATA PROCESSING APPARATUS HAVING A BUILT-IN FLASH MEMORY IS REWRITABLE BY USE OF AN EXTERNAL DEVICE Aug 9, 1993 Abandoned
08/100942 METHOD FOR USE WITH A DATA COHERENCY PROTOCOL ALLOWING MULTIPLE SNOOP QUERIES TO A SINGLE SNOOP TRANSACTION AND SYSTEM THEREFOR Aug 2, 1993 Pending
08/098780 COMMUNICATION CONTROL APPARATUS BETWEEN PROCESSOR SYSTEMS Jul 28, 1993 Pending
Array ( [id] => 4391351 [patent_doc_number] => 06289402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Bidirectional data transfer protocol primarily controlled by a peripheral device' [patent_app_type] => 1 [patent_app_number] => 8/097372 [patent_app_country] => US [patent_app_date] => 1993-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4477 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289402.pdf [firstpage_image] =>[orig_patent_app_number] => 097372 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/097372 		Bidirectional data transfer protocol primarily controlled by a peripheral device Jul 22, 1993 Issued
08/094491 APPARATUS FOR ADDING MODEM CAPABILITIES TO A COMPUTER SYSTEM EQUIPPED WITH A DIGITAL SIGNAL PROCESSOR Jul 18, 1993 Pending
08/093230 MICROPROCESSOR WITH REGISTERED CLOCK COUNTING FOR AT A PREDETERMINED COUNT PRODUCING A COMMAND SIGNAL OF ADJUSTABLE SHAPE, AND A HIERARCHICAL INTERRUPT SYSTEM FOR USE THEREWITH Jul 15, 1993 Pending
08/087892 RECORDING AND REPRODUCING DEVICE FOR RECORDING AND REPRODUCING INFORMATION FROM DIFFERENT KINDS OF STORAGE MEDIA HAVING DIFFERENT SECTOR FORMATS Jul 8, 1993 Pending
08/089759 MEMORY CONTROL APPARATUS PROVIDING TIME SLOT COMPRESSION Jul 8, 1993 Pending
08/088565 HARDWARE INTERRUPT AND DUAL-POINTER GLOBAL ROTATION FOR ASYNCHRONOUS OPERATION IN VIDEO SIGNAL PROCESSING Jul 6, 1993 Pending
08/085322 TWO-PART MEMORY CARD SOCKET CONNECTOR AND RELATED INTERRUPT HANDLER Jun 28, 1993 Pending
08/077213 FACILITY FOR FORMATTING COMPILER OUTPUT Jun 13, 1993 Pending
08/068696 FULL DUPLEX BUFFER MANAGEMENT AND APPARATUS May 26, 1993 Pending
Array ( [id] => 3626540 [patent_doc_number] => 05535376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/062625 [patent_app_country] => US [patent_app_date] => 1993-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6662 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535376.pdf [firstpage_image] =>[orig_patent_app_number] => 062625 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/062625 		Data processor having a timer circuit for performing a buffered pulse width modulation function and method therefor May 17, 1993 Issued
Array ( [id] => 3891172 [patent_doc_number] => 05729556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'System decoder circuit with temporary bit storage and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/054127 [patent_app_country] => US [patent_app_date] => 1993-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 38 [patent_no_of_words] => 31728 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729556.pdf [firstpage_image] =>[orig_patent_app_number] => 054127 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/054127 		System decoder circuit with temporary bit storage and method of operation Apr 25, 1993 Issued
Array ( [id] => 3631444 [patent_doc_number] => 05642437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'System decoder circuit with temporary bit storage and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/054126 [patent_app_country] => US [patent_app_date] => 1993-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 38 [patent_no_of_words] => 32265 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642437.pdf [firstpage_image] =>[orig_patent_app_number] => 054126 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/054126 		System decoder circuit with temporary bit storage and method of operation Apr 25, 1993 Issued
08/038359 ASIC PROTOTYPER Mar 25, 1993 Pending
08/037080 CASE-BASED SCHEDULING SYSTEM FOR ASSIGNING RESOURCES WITH LIMITED CAPACITY Mar 24, 1993 Pending
08/034564 VERIFICATION OF CIRCUIT DESIGN Mar 18, 1993 Pending
08/029061 DOCUMENT PROCESSING METHOD SYSTEM Mar 9, 1993 Pending
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