Search

Kenneth S. Kim

Examiner (ID: 328)

Most Active Art Unit
2111
Art Unit(s)
2783, 2315, 2181, 2183, 2784, 2111, 1107, 2302, 2185
Total Applications
1565
Issued Applications
1268
Pending Applications
37
Abandoned Applications
262

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3776151 [patent_doc_number] => 05742805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Method and apparatus for a single history register based branch predictor in a superscalar microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/601744 [patent_app_country] => US [patent_app_date] => 1996-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3754 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 460 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742805.pdf [firstpage_image] =>[orig_patent_app_number] => 601744 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/601744
Method and apparatus for a single history register based branch predictor in a superscalar microprocessor Feb 14, 1996 Issued
08/605344 SPECULATIVE EXECUTION IN A PIPELINED PROCESSOR Feb 13, 1996 Abandoned
Array ( [id] => 3757860 [patent_doc_number] => 05754771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Maximum receive capacity specifying query processing client/server system replying up to the capacity and sending the remainder upon subsequent request' [patent_app_type] => 1 [patent_app_number] => 8/598594 [patent_app_country] => US [patent_app_date] => 1996-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9237 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754771.pdf [firstpage_image] =>[orig_patent_app_number] => 598594 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598594
Maximum receive capacity specifying query processing client/server system replying up to the capacity and sending the remainder upon subsequent request Feb 11, 1996 Issued
Array ( [id] => 4081446 [patent_doc_number] => 05867682 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'High performance superscalar microprocessor including a circuit for converting CISC instructions to RISC operations' [patent_app_type] => 1 [patent_app_number] => 8/599696 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 30536 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/867/05867682.pdf [firstpage_image] =>[orig_patent_app_number] => 599696 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599696
High performance superscalar microprocessor including a circuit for converting CISC instructions to RISC operations Feb 8, 1996 Issued
Array ( [id] => 3701115 [patent_doc_number] => 05664136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'High performance superscalar microprocessor including a dual-pathway circuit for converting cisc instructions to risc operations' [patent_app_type] => 1 [patent_app_number] => 8/599700 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 33921 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/664/05664136.pdf [firstpage_image] =>[orig_patent_app_number] => 599700 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599700
High performance superscalar microprocessor including a dual-pathway circuit for converting cisc instructions to risc operations Feb 8, 1996 Issued
Array ( [id] => 3718494 [patent_doc_number] => 05655098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'High performance superscalar microprocessor including a circuit for byte-aligning cisc instructions stored in a variable byte-length format' [patent_app_type] => 1 [patent_app_number] => 8/599697 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 30549 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655098.pdf [firstpage_image] =>[orig_patent_app_number] => 599697 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599697
High performance superscalar microprocessor including a circuit for byte-aligning cisc instructions stored in a variable byte-length format Feb 8, 1996 Issued
Array ( [id] => 3918323 [patent_doc_number] => 05751981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'High performance superscalar microprocessor including a speculative instruction queue for byte-aligning CISC instructions stored in a variable byte-length format' [patent_app_type] => 1 [patent_app_number] => 8/599699 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 38 [patent_no_of_words] => 37835 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751981.pdf [firstpage_image] =>[orig_patent_app_number] => 599699 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599699
High performance superscalar microprocessor including a speculative instruction queue for byte-aligning CISC instructions stored in a variable byte-length format Feb 8, 1996 Issued
Array ( [id] => 3718479 [patent_doc_number] => 05655097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'High performance superscalar microprocessor including an instruction cache circuit for byte-aligning CISC instructions stored in a variable byte-length format' [patent_app_type] => 1 [patent_app_number] => 8/599698 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 33935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655097.pdf [firstpage_image] =>[orig_patent_app_number] => 599698 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599698
High performance superscalar microprocessor including an instruction cache circuit for byte-aligning CISC instructions stored in a variable byte-length format Feb 8, 1996 Issued
Array ( [id] => 3672369 [patent_doc_number] => 05592628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Data communication system which guarantees at a transmission station the arrival of transmitted data to a receiving station and method thereof' [patent_app_type] => 1 [patent_app_number] => 8/595505 [patent_app_country] => US [patent_app_date] => 1996-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7878 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592628.pdf [firstpage_image] =>[orig_patent_app_number] => 595505 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/595505
Data communication system which guarantees at a transmission station the arrival of transmitted data to a receiving station and method thereof Jan 31, 1996 Issued
Array ( [id] => 3854830 [patent_doc_number] => 05708812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Method and apparatus for Migrating from a source domain network controller to a target domain network controller' [patent_app_type] => 1 [patent_app_number] => 8/588344 [patent_app_country] => US [patent_app_date] => 1996-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11123 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708812.pdf [firstpage_image] =>[orig_patent_app_number] => 588344 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588344
Method and apparatus for Migrating from a source domain network controller to a target domain network controller Jan 17, 1996 Issued
Array ( [id] => 3728771 [patent_doc_number] => 05617432 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Common error protection code for data stored as a composite of different data formats' [patent_app_type] => 1 [patent_app_number] => 8/585002 [patent_app_country] => US [patent_app_date] => 1996-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3915 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617432.pdf [firstpage_image] =>[orig_patent_app_number] => 585002 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/585002
Common error protection code for data stored as a composite of different data formats Jan 4, 1996 Issued
Array ( [id] => 3857904 [patent_doc_number] => 05745685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Protocol extension in NSPP using an acknowledgment bit' [patent_app_type] => 1 [patent_app_number] => 8/581745 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5460 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745685.pdf [firstpage_image] =>[orig_patent_app_number] => 581745 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581745
Protocol extension in NSPP using an acknowledgment bit Dec 28, 1995 Issued
Array ( [id] => 3870607 [patent_doc_number] => 05706437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'System and method for accessing a service on a services network' [patent_app_type] => 1 [patent_app_number] => 8/581744 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9243 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706437.pdf [firstpage_image] =>[orig_patent_app_number] => 581744 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581744
System and method for accessing a service on a services network Dec 28, 1995 Issued
Array ( [id] => 3828606 [patent_doc_number] => 05771355 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Transmitting electronic mail by either reference or value at file-replication points to minimize costs' [patent_app_type] => 1 [patent_app_number] => 8/576006 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8544 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771355.pdf [firstpage_image] =>[orig_patent_app_number] => 576006 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576006
Transmitting electronic mail by either reference or value at file-replication points to minimize costs Dec 20, 1995 Issued
Array ( [id] => 3776433 [patent_doc_number] => 05742822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Multithreaded processor which dynamically discriminates a parallel execution and a sequential execution of threads' [patent_app_type] => 1 [patent_app_number] => 8/575145 [patent_app_country] => US [patent_app_date] => 1995-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6444 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742822.pdf [firstpage_image] =>[orig_patent_app_number] => 575145 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575145
Multithreaded processor which dynamically discriminates a parallel execution and a sequential execution of threads Dec 18, 1995 Issued
Array ( [id] => 4370303 [patent_doc_number] => 06216151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Saving connection time by obtaining result of request at later reconnection with server supplied associated key' [patent_app_type] => 1 [patent_app_number] => 8/571644 [patent_app_country] => US [patent_app_date] => 1995-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6386 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216151.pdf [firstpage_image] =>[orig_patent_app_number] => 571644 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/571644
Saving connection time by obtaining result of request at later reconnection with server supplied associated key Dec 12, 1995 Issued
Array ( [id] => 3788404 [patent_doc_number] => 05774709 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Enhanced branch delay slot handling with single exception program counter' [patent_app_type] => 1 [patent_app_number] => 8/567944 [patent_app_country] => US [patent_app_date] => 1995-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2566 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774709.pdf [firstpage_image] =>[orig_patent_app_number] => 567944 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/567944
Enhanced branch delay slot handling with single exception program counter Dec 5, 1995 Issued
Array ( [id] => 3760004 [patent_doc_number] => 05717854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Multimedia server having a plurality of stream controllers directly connected to the network' [patent_app_type] => 1 [patent_app_number] => 8/563544 [patent_app_country] => US [patent_app_date] => 1995-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8879 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717854.pdf [firstpage_image] =>[orig_patent_app_number] => 563544 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/563544
Multimedia server having a plurality of stream controllers directly connected to the network Nov 27, 1995 Issued
Array ( [id] => 3700724 [patent_doc_number] => 05696956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Dynamically programmable reduced instruction set computer with programmable processor loading on program number field and program number register contents' [patent_app_type] => 1 [patent_app_number] => 8/554643 [patent_app_country] => US [patent_app_date] => 1995-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 11460 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696956.pdf [firstpage_image] =>[orig_patent_app_number] => 554643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/554643
Dynamically programmable reduced instruction set computer with programmable processor loading on program number field and program number register contents Nov 7, 1995 Issued
Array ( [id] => 3743312 [patent_doc_number] => 05666478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Method and apparatus for processing characters based on previously- used scalable font data' [patent_app_type] => 1 [patent_app_number] => 8/551960 [patent_app_country] => US [patent_app_date] => 1995-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6232 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666478.pdf [firstpage_image] =>[orig_patent_app_number] => 551960 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/551960
Method and apparatus for processing characters based on previously- used scalable font data Nov 1, 1995 Issued
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