Kenneth S. Kim

Array ( [id] => 3760449 [patent_doc_number] => 05717883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Method and apparatus for parallel execution of computer programs using information providing for reconstruction of a logical sequential program' [patent_app_type] => 1 [patent_app_number] => 8/495142 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 14559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717883.pdf [firstpage_image] =>[orig_patent_app_number] => 495142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3581352 [patent_doc_number] => 05539621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Network communication unit with client and resource node array double layer ICs on printed board with connectors on housing' [patent_app_type] => 1 [patent_app_number] => 8/493917 [patent_app_country] => US [patent_app_date] => 1995-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5570 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539621.pdf [firstpage_image] =>[orig_patent_app_number] => 493917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3588872 [patent_doc_number] => 05524223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Instruction accelerator for processing loop instructions with address generator using multiple stored increment values' [patent_app_type] => 1 [patent_app_number] => 8/489241 [patent_app_country] => US [patent_app_date] => 1995-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5886 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/524/05524223.pdf [firstpage_image] =>[orig_patent_app_number] => 489241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3659919 [patent_doc_number] => 05640503 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Method and apparatus for verifying a target instruction before execution of the target instruction using a test operation instruction which identifies the target instruction' [patent_app_type] => 1 [patent_app_number] => 8/487670 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4136 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640503.pdf [firstpage_image] =>[orig_patent_app_number] => 487670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3567203 [patent_doc_number] => 05574945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Multi channel inter-processor coupling facility processing received commands stored in memory absent status error of channels' [patent_app_type] => 1 [patent_app_number] => 8/477926 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 7895 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574945.pdf [firstpage_image] =>[orig_patent_app_number] => 477926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4063274 [patent_doc_number] => 05964835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source' [patent_app_type] => 1 [patent_app_number] => 8/482618 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 55 [patent_no_of_words] => 61677 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/964/05964835.pdf [firstpage_image] =>[orig_patent_app_number] => 482618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3717076 [patent_doc_number] => 05675807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Interrupt message delivery identified by storage location of received interrupt data' [patent_app_type] => 1 [patent_app_number] => 8/481749 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 56 [patent_no_of_words] => 61761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675807.pdf [firstpage_image] =>[orig_patent_app_number] => 481749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3635697 [patent_doc_number] => 05613101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Method and apparatus for determining at execution compatibility among client and provider components where provider version linked with client may differ from provider version available at execution' [patent_app_type] => 1 [patent_app_number] => 8/483621 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7889 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/613/05613101.pdf [firstpage_image] =>[orig_patent_app_number] => 483621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3614738 [patent_doc_number] => 05579384 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Telecommunications network service central management system interfacing with protocol specific regional stations providing services to subscribers' [patent_app_type] => 1 [patent_app_number] => 8/474540 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5834 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579384.pdf [firstpage_image] =>[orig_patent_app_number] => 474540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3538062 [patent_doc_number] => 05504932 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'System for executing scalar instructions in parallel based on control bits appended by compounding decoder' [patent_app_type] => 1 [patent_app_number] => 8/488464 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 9587 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504932.pdf [firstpage_image] =>[orig_patent_app_number] => 488464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3933399 [patent_doc_number] => 05914953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Network message routing using routing table information and supplemental enable information for deadlock prevention' [patent_app_type] => 1 [patent_app_number] => 8/474772 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 54 [patent_no_of_words] => 61643 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914953.pdf [firstpage_image] =>[orig_patent_app_number] => 474772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3628842 [patent_doc_number] => 05689313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Buffer management in an image formatter' [patent_app_type] => 1 [patent_app_number] => 8/485242 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4680 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 456 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689313.pdf [firstpage_image] =>[orig_patent_app_number] => 485242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3700664 [patent_doc_number] => 05696954 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Three input arithmetic logic unit with shifting means at one input forming a sum/difference of two inputs logically anded with a third input logically ored with the sum/difference logically anded with an inverse of the third input' [patent_app_type] => 1 [patent_app_number] => 8/486562 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 70 [patent_no_of_words] => 99180 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696954.pdf [firstpage_image] =>[orig_patent_app_number] => 486562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3713525 [patent_doc_number] => 05675579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method for verifying responses to messages using a barrier message' [patent_app_type] => 1 [patent_app_number] => 8/474770 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 56 [patent_no_of_words] => 61687 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675579.pdf [firstpage_image] =>[orig_patent_app_number] => 474770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3895600 [patent_doc_number] => 05765037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'System for executing instructions with delayed firing times' [patent_app_type] => 1 [patent_app_number] => 8/480841 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 25451 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765037.pdf [firstpage_image] =>[orig_patent_app_number] => 480841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3642127 [patent_doc_number] => 05687343 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Product for global updating modified data object represented in concatenated multiple virtual space by segment mapping' [patent_app_type] => 1 [patent_app_number] => 8/468771 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 7547 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 420 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687343.pdf [firstpage_image] =>[orig_patent_app_number] => 468771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3616501 [patent_doc_number] => 05579499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Product for representing data object in concatenated multiple virtual address spaces with combined requests for segment mapping' [patent_app_type] => 1 [patent_app_number] => 8/468987 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 7538 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 510 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579499.pdf [firstpage_image] =>[orig_patent_app_number] => 468987 [rel_patent_id] =>[rel_patent_doc_number] =>)