| Application number | Title of the application | Filing Date | Status |
|---|
| 07/629478 | EMULATOR CONFIGURATION SYSTEM | Dec 17, 1990 | Abandoned |
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| 07/627283 | DESIGN EVALUATION APPARATUS | Dec 12, 1990 | Abandoned |
Array
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[patent_kind] => NA
[patent_issue_date] => 1993-12-07
[patent_title] => 'RISC system capable of simultaneously executing data interlocked shift and arithmetic/logic instructions in one clock cycle by bypassing register'
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[patent_app_number] => 7/609408
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Array
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[patent_doc_number] => 05083262
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[patent_kind] => NA
[patent_issue_date] => 1992-01-21
[patent_title] => 'Language bindings for graphics functions to enable one application program to be used in different processing environments'
[patent_app_type] => 1
[patent_app_number] => 7/590327
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| 07/579631 | MICRODE LINKER /LOADER THAT GENERATES MICROCODE SEQUENCES FOR MRI SEQUENCER BY MODIFYING PREVIOUSLY GENERATED MICROCODE SEQUENCES | Sep 9, 1990 | Abandoned |
| 07/499504 | A PROGRAMMED SYSTEM HAVING SAFEGUARDED REMOTE LOADING OF A TERMINAL ACCESSED FROM A REMOTE COMPUTER | Sep 9, 1990 | Abandoned |
| 07/576159 | INFORMATION PROCESSING SYSTEM HAVING IMPROVED INTERFACE | Aug 29, 1990 | Abandoned |
Array
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[patent_doc_number] => 05150469
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[patent_issue_date] => 1992-09-22
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Array
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[patent_doc_number] => 05015623
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-14
[patent_title] => 'Planar Josephson device with a silver salt interlayer'
[patent_app_type] => 1
[patent_app_number] => 7/549341
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Array
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[patent_doc_number] => 05430862
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[patent_kind] => NA
[patent_issue_date] => 1995-07-04
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[patent_app_type] => 1
[patent_app_number] => 7/546348
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| 07/541477 | MCROCONTROLLER PERIPHERAL EXPANSION BUS | Jun 21, 1990 | Abandoned |
Array
(
[id] => 2930728
[patent_doc_number] => 05193202
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-09
[patent_title] => 'Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor'
[patent_app_type] => 1
[patent_app_number] => 7/529947
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/529947 | Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor | May 28, 1990 | Issued |
| 07/528951 | MULTI-DEVICE EMULATION | May 24, 1990 | Abandoned |
Array
(
[id] => 2924703
[patent_doc_number] => 05228127
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[patent_issue_date] => 1993-07-13
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Array
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[id] => 2693734
[patent_doc_number] => 04996169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-26
[patent_title] => 'Semiconductor laser assembly'
[patent_app_type] => 1
[patent_app_number] => 7/525525
[patent_app_country] => US
[patent_app_date] => 1990-05-18
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Array
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[id] => 2899423
[patent_doc_number] => 05214763
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-25
[patent_title] => 'Digital computer system capable of processing two or more instructions in parallel and having a coche and instruction compounding mechanism'
[patent_app_type] => 1
[patent_app_number] => 7/522291
[patent_app_country] => US
[patent_app_date] => 1990-05-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/522291 | Digital computer system capable of processing two or more instructions in parallel and having a coche and instruction compounding mechanism | May 9, 1990 | Issued |
| 07/521827 | MULTIPROCESSOR TYPE TIME VARYING IMAGE ENCODING SYSTEM AND IMAGE PROCESSOR | May 9, 1990 | Abandoned |
| 07/519382 | GENERAL PURPOSE COMPOUNDING TECHNIQUE FOR INSTRUCTION-LEVEL PARALLEL PROCESSORS | May 3, 1990 | Abandoned |
| 07/519384 | SYSTEM AND METHOD FOR OBTAINING PRALIEL EXISTING INSTRUCTIONSIN A PARTICULAR DATA PROCESSING CONFIGURATION BY COMPOUNDING INSTRUCTIONS | May 3, 1990 | Abandoned |