Search

Kenneth S. Kim

Examiner (ID: 328)

Most Active Art Unit
2111
Art Unit(s)
2783, 2315, 2181, 2183, 2784, 2111, 1107, 2302, 2185
Total Applications
1565
Issued Applications
1268
Pending Applications
37
Abandoned Applications
262

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2867747 [patent_doc_number] => 05113520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'Data processor enabling prioritizing of concurrent tasks' [patent_app_type] => 1 [patent_app_number] => 7/427911 [patent_app_country] => US [patent_app_date] => 1989-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3934 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113520.pdf [firstpage_image] =>[orig_patent_app_number] => 427911 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/427911
Data processor enabling prioritizing of concurrent tasks Oct 23, 1989 Issued
Array ( [id] => 2877142 [patent_doc_number] => 05097414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Buffer-storage control system for simultaneously accessible partitions of tag and data blocks of buffer storage' [patent_app_type] => 1 [patent_app_number] => 7/423588 [patent_app_country] => US [patent_app_date] => 1989-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3265 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/097/05097414.pdf [firstpage_image] =>[orig_patent_app_number] => 423588 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/423588
Buffer-storage control system for simultaneously accessible partitions of tag and data blocks of buffer storage Oct 16, 1989 Issued
Array ( [id] => 2952182 [patent_doc_number] => 05261111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Pipelined processor for vector data classification according to vector attributes using coupled comparator chain and logic gate to respective bin chain' [patent_app_type] => 1 [patent_app_number] => 7/421343 [patent_app_country] => US [patent_app_date] => 1989-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261111.pdf [firstpage_image] =>[orig_patent_app_number] => 421343 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/421343
Pipelined processor for vector data classification according to vector attributes using coupled comparator chain and logic gate to respective bin chain Oct 12, 1989 Issued
07/413265 SEMICONDUCTOR DEVICE WITH SCHEME FOR CONNECTING A QUANTITY OF INTERNAL TIMERS TO A SMALLER QUANTITY OF EXTERNAL TERMINALS Sep 26, 1989 Abandoned
Array ( [id] => 2832195 [patent_doc_number] => 05168557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Instruction prefetching device having a history table for memorizing page last real instruction addresses and page-over all real instruction addresses providing for quicker page-over processing time' [patent_app_type] => 1 [patent_app_number] => 7/410577 [patent_app_country] => US [patent_app_date] => 1989-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 19061 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 655 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168557.pdf [firstpage_image] =>[orig_patent_app_number] => 410577 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/410577
Instruction prefetching device having a history table for memorizing page last real instruction addresses and page-over all real instruction addresses providing for quicker page-over processing time Sep 20, 1989 Issued
07/405887 SYSTEM AND METHOD FOR CONTROLLING A SYSTEM BUS IN A COMPUTER SYSTEM. Sep 10, 1989 Abandoned
Array ( [id] => 2754233 [patent_doc_number] => 05043291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Method of manufacturing a broadband high emission power semiconductor laser from a BRS type buried stripe structure, and resulting laser' [patent_app_type] => 1 [patent_app_number] => 7/404086 [patent_app_country] => US [patent_app_date] => 1989-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3866 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043291.pdf [firstpage_image] =>[orig_patent_app_number] => 404086 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/404086
Method of manufacturing a broadband high emission power semiconductor laser from a BRS type buried stripe structure, and resulting laser Sep 6, 1989 Issued
Array ( [id] => 2899586 [patent_doc_number] => 05214771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-25 [patent_title] => 'System for loading same type adaptors with latest version control codes stored on adaptor memory by selecting the identified chip during initialization' [patent_app_type] => 1 [patent_app_number] => 7/401895 [patent_app_country] => US [patent_app_date] => 1989-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7641 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 426 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/214/05214771.pdf [firstpage_image] =>[orig_patent_app_number] => 401895 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/401895
System for loading same type adaptors with latest version control codes stored on adaptor memory by selecting the identified chip during initialization Aug 31, 1989 Issued
Array ( [id] => 2867375 [patent_doc_number] => 05113500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'Multiple cooperating and concurrently operating processors using individually dedicated memories' [patent_app_type] => 1 [patent_app_number] => 7/397620 [patent_app_country] => US [patent_app_date] => 1989-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 14558 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113500.pdf [firstpage_image] =>[orig_patent_app_number] => 397620 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/397620
Multiple cooperating and concurrently operating processors using individually dedicated memories Aug 22, 1989 Issued
Array ( [id] => 2872779 [patent_doc_number] => 05167030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'System for dynamically allocating main memory to facilitate swapping of terminate and stay resident communication program to increase available memory space' [patent_app_type] => 1 [patent_app_number] => 7/397752 [patent_app_country] => US [patent_app_date] => 1989-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4309 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/167/05167030.pdf [firstpage_image] =>[orig_patent_app_number] => 397752 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/397752
System for dynamically allocating main memory to facilitate swapping of terminate and stay resident communication program to increase available memory space Aug 22, 1989 Issued
Array ( [id] => 2843502 [patent_doc_number] => 05175860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'System string search system using matrix memory?comparator with columns simultaneously comparing with symbols of string supplied in parallel from a column of input shift registers' [patent_app_type] => 1 [patent_app_number] => 7/397029 [patent_app_country] => US [patent_app_date] => 1989-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4233 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175860.pdf [firstpage_image] =>[orig_patent_app_number] => 397029 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/397029
System string search system using matrix memory?comparator with columns simultaneously comparing with symbols of string supplied in parallel from a column of input shift registers Aug 21, 1989 Issued
Array ( [id] => 2995877 [patent_doc_number] => 05212633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'System for transferring resident programs to virtual area and recalling for instant excution in memory limited DOS system using program control tables' [patent_app_type] => 1 [patent_app_number] => 7/395527 [patent_app_country] => US [patent_app_date] => 1989-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 38 [patent_no_of_words] => 16840 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 1140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212633.pdf [firstpage_image] =>[orig_patent_app_number] => 395527 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/395527
System for transferring resident programs to virtual area and recalling for instant excution in memory limited DOS system using program control tables Aug 17, 1989 Issued
Array ( [id] => 2928298 [patent_doc_number] => 05179712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-12 [patent_title] => 'Rank cell array structure for sorting by each cell comparing the cell value to previous cell value, next cell value, in value and out value' [patent_app_type] => 1 [patent_app_number] => 7/394468 [patent_app_country] => US [patent_app_date] => 1989-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4186 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/179/05179712.pdf [firstpage_image] =>[orig_patent_app_number] => 394468 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/394468
Rank cell array structure for sorting by each cell comparing the cell value to previous cell value, next cell value, in value and out value Aug 15, 1989 Issued
07/389692 DATA PROCESSING APPARATUS FOR PERFORMING PARALLEL DECODING AND PARALLEL EXECUTION OF A VARIABLE WORD LENGTH INSTRUCTION Aug 3, 1989 Abandoned
Array ( [id] => 2888673 [patent_doc_number] => 05185865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'System for simulating block transfer with slave module incapable of block transfer by locking bus for multiple individual transfers' [patent_app_type] => 1 [patent_app_number] => 7/389759 [patent_app_country] => US [patent_app_date] => 1989-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3663 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185865.pdf [firstpage_image] =>[orig_patent_app_number] => 389759 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/389759
System for simulating block transfer with slave module incapable of block transfer by locking bus for multiple individual transfers Aug 3, 1989 Issued
Array ( [id] => 2891882 [patent_doc_number] => 05119484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Selections between alternate control word and current instruction generated control word for alu in respond to alu output and current instruction' [patent_app_type] => 1 [patent_app_number] => 7/385944 [patent_app_country] => US [patent_app_date] => 1989-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 21431 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119484.pdf [firstpage_image] =>[orig_patent_app_number] => 385944 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/385944
Selections between alternate control word and current instruction generated control word for alu in respond to alu output and current instruction Jul 24, 1989 Issued
Array ( [id] => 2998724 [patent_doc_number] => 05251307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Channel apparatus with a function for converting virtual address to real address' [patent_app_type] => 1 [patent_app_number] => 7/389270 [patent_app_country] => US [patent_app_date] => 1989-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4044 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/251/05251307.pdf [firstpage_image] =>[orig_patent_app_number] => 389270 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/389270
Channel apparatus with a function for converting virtual address to real address Jul 20, 1989 Issued
Array ( [id] => 2772538 [patent_doc_number] => 05063498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Data processing device with direct memory access function processed as an micro-code vectored interrupt' [patent_app_type] => 1 [patent_app_number] => 7/383266 [patent_app_country] => US [patent_app_date] => 1989-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3784 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063498.pdf [firstpage_image] =>[orig_patent_app_number] => 383266 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/383266
Data processing device with direct memory access function processed as an micro-code vectored interrupt Jul 19, 1989 Issued
Array ( [id] => 2798961 [patent_doc_number] => 05142687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'Sort accelerator with rebound sorter repeatedly merging sorted strings' [patent_app_type] => 1 [patent_app_number] => 7/374433 [patent_app_country] => US [patent_app_date] => 1989-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 19307 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 687 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/142/05142687.pdf [firstpage_image] =>[orig_patent_app_number] => 374433 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/374433
Sort accelerator with rebound sorter repeatedly merging sorted strings Jun 29, 1989 Issued
Array ( [id] => 2872695 [patent_doc_number] => 05150468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'State controlled instruction logic management apparatus included in a pipelined processing unit' [patent_app_type] => 1 [patent_app_number] => 7/374881 [patent_app_country] => US [patent_app_date] => 1989-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6777 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/150/05150468.pdf [firstpage_image] =>[orig_patent_app_number] => 374881 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/374881
State controlled instruction logic management apparatus included in a pipelined processing unit Jun 29, 1989 Issued
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