Search

Kenneth S. Kim

Examiner (ID: 328)

Most Active Art Unit
2111
Art Unit(s)
2783, 2315, 2181, 2183, 2784, 2111, 1107, 2302, 2185
Total Applications
1565
Issued Applications
1268
Pending Applications
37
Abandoned Applications
262

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2867287 [patent_doc_number] => 05113496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'Bus interconnection structure with redundancy linking plurality of groups of processors, with servers for each group mounted on chassis' [patent_app_type] => 1 [patent_app_number] => 7/320502 [patent_app_country] => US [patent_app_date] => 1989-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 22 [patent_no_of_words] => 24646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113496.pdf [firstpage_image] =>[orig_patent_app_number] => 320502 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/320502
Bus interconnection structure with redundancy linking plurality of groups of processors, with servers for each group mounted on chassis Mar 7, 1989 Issued
Array ( [id] => 2842670 [patent_doc_number] => 05175818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Communication interface for independently generating frame information that is subsequently stored in host memory and sent out to transmitting fifo by dma' [patent_app_type] => 1 [patent_app_number] => 7/313601 [patent_app_country] => US [patent_app_date] => 1989-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3613 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175818.pdf [firstpage_image] =>[orig_patent_app_number] => 313601 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/313601
Communication interface for independently generating frame information that is subsequently stored in host memory and sent out to transmitting fifo by dma Feb 20, 1989 Issued
Array ( [id] => 2892548 [patent_doc_number] => 05109495 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor' [patent_app_type] => 1 [patent_app_number] => 7/306843 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 13818 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109495.pdf [firstpage_image] =>[orig_patent_app_number] => 306843 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306843
Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor Feb 2, 1989 Issued
07/302347 SPECIFIC ACCESS METHOD FOR A MEMORY BUFFER CONTROL UNIT 0PERABLE WITHOUT UNUSED TIME EMPLOYING A REGISTER FOR PRELIMINARY HOLDING A REQUEST CODE AND A CIRCUIT FOR PRODUCING AN ADDRESS FOR DELIVERY WITH THE REQUEST CODE Jan 26, 1989 Abandoned
Array ( [id] => 2863936 [patent_doc_number] => 05134693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'System for handling occurrence of exceptions during execution of microinstructions while running floating point and non-floating point instructions in parallel' [patent_app_type] => 1 [patent_app_number] => 7/298520 [patent_app_country] => US [patent_app_date] => 1989-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8065 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134693.pdf [firstpage_image] =>[orig_patent_app_number] => 298520 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/298520
System for handling occurrence of exceptions during execution of microinstructions while running floating point and non-floating point instructions in parallel Jan 17, 1989 Issued
Array ( [id] => 2866131 [patent_doc_number] => 05127091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor' [patent_app_type] => 1 [patent_app_number] => 7/297784 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5104 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/127/05127091.pdf [firstpage_image] =>[orig_patent_app_number] => 297784 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297784
System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor Jan 12, 1989 Issued
Array ( [id] => 2998651 [patent_doc_number] => 05251303 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'System for DMA block data transfer based on linked control blocks' [patent_app_type] => 1 [patent_app_number] => 7/297778 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2350 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/251/05251303.pdf [firstpage_image] =>[orig_patent_app_number] => 297778 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297778
System for DMA block data transfer based on linked control blocks Jan 12, 1989 Issued
Array ( [id] => 2861102 [patent_doc_number] => 05089956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Method of distributing related documents to identified end users in an information processing system' [patent_app_type] => 1 [patent_app_number] => 7/277390 [patent_app_country] => US [patent_app_date] => 1988-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5543 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089956.pdf [firstpage_image] =>[orig_patent_app_number] => 277390 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/277390
Method of distributing related documents to identified end users in an information processing system Nov 28, 1988 Issued
Array ( [id] => 2816139 [patent_doc_number] => 05125087 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Method of resetting sequence of access to extended memory disrupted by interrupt processing in 80286 compatible system using code segment register' [patent_app_type] => 1 [patent_app_number] => 7/268392 [patent_app_country] => US [patent_app_date] => 1988-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 9 [patent_no_of_words] => 3932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/125/05125087.pdf [firstpage_image] =>[orig_patent_app_number] => 268392 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/268392
Method of resetting sequence of access to extended memory disrupted by interrupt processing in 80286 compatible system using code segment register Nov 6, 1988 Issued
Array ( [id] => 2678495 [patent_doc_number] => 05073871 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-17 [patent_title] => 'Main storage access priority control system that checks bus conflict condition and logical storage busy condition at different clock cycles' [patent_app_type] => 1 [patent_app_number] => 7/246087 [patent_app_country] => US [patent_app_date] => 1988-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6107 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/073/05073871.pdf [firstpage_image] =>[orig_patent_app_number] => 246087 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/246087
Main storage access priority control system that checks bus conflict condition and logical storage busy condition at different clock cycles Sep 18, 1988 Issued
Array ( [id] => 2816869 [patent_doc_number] => 05146568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Remote bootstrapping a node over communication link by initially requesting remote storage access program which emulates local disk to load other programs' [patent_app_type] => 1 [patent_app_number] => 7/240955 [patent_app_country] => US [patent_app_date] => 1988-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3777 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146568.pdf [firstpage_image] =>[orig_patent_app_number] => 240955 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/240955
Remote bootstrapping a node over communication link by initially requesting remote storage access program which emulates local disk to load other programs Sep 5, 1988 Issued
07/210819 METHOD OR SYSTEM FOR COMPUTER PROCESSING OF DATABASE RECORDS Jun 23, 1988 Abandoned
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