Kenneth T. Lam

Array ( [id] => 19420924 [patent_doc_number] => 20240297048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => HIGH-ASPECT RATIO METALLIZED STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/657487 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20037966 [patent_doc_number] => 20250176188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/608931 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19868284 [patent_doc_number] => 20250107070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/439863 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19470590 [patent_doc_number] => 20240324260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => DISPLAY PANEL AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/422612 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19335680 [patent_doc_number] => 20240250110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => IMAGE SENSORS WITH A TUNABLE FLOATING DIFFUSION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/404530 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19421098 [patent_doc_number] => 20240297222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SiC EPITAXIAL WAFER [patent_app_type] => utility [patent_app_number] => 18/394568 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19253028 [patent_doc_number] => 20240204025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 18/526404 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19161359 [patent_doc_number] => 20240154066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => EMISSIVE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/492846 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19436189 [patent_doc_number] => 20240304687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SPACER STRUCTURES IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/232986 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18812920 [patent_doc_number] => 20230387257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => TRANSISTOR SPACER STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/447680 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18987998 [patent_doc_number] => 20240059967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => ETCHING COMPOSITION AND METHOD OF MANUFACTURING INTEGRATED CIRCUITS USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/227454 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18743500 [patent_doc_number] => 20230352488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => GATE STACK DIPOLE COMPENSATION FOR THRESHOLD VOLTAGE DEFINITION IN TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/219695 [patent_app_country] => US [patent_app_date] => 2023-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19688196 [patent_doc_number] => 20250006741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/345552 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20590335 [patent_doc_number] => 20260075936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => AMORPHIZED SUBFINS USING BACKSIDE IMPLANTATION [patent_app_type] => utility [patent_app_number] => 18/217139 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18217139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19688185 [patent_doc_number] => 20250006730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => STACKED TRANSISTORS WITH DIELECTRIC INSULATOR LAYERS [patent_app_type] => utility [patent_app_number] => 18/342090 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19407323 [patent_doc_number] => 20240290834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING BACKSIDE ISOLATION STRUCTURE AND PLACEHOLDER ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/214221 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18214221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19646682 [patent_doc_number] => 20240421202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => FEEDTHROUGH VIA BETWEEN ACTIVE REGIONS [patent_app_type] => utility [patent_app_number] => 18/335525 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19646708 [patent_doc_number] => 20240421228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => NOISE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/334630 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18334630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19619446 [patent_doc_number] => 20240405126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/205191 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19604936 [patent_doc_number] => 20240395816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => HYBRID ORIENTATION CHANNELS AND MIXED ORIENTATION BOTTOM EPITAXY [patent_app_type] => utility [patent_app_number] => 18/321838 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321838 [rel_patent_id] =>[rel_patent_doc_number] =>)