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Kenneth T. Lam

Examiner (ID: 13781)

Most Active Art Unit
2631
Art Unit(s)
2611, 2631
Total Applications
1162
Issued Applications
934
Pending Applications
88
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19392991 [patent_doc_number] => 20240282861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => TRANSISTOR STRUCTURE WITH MULTIPLE VERTICAL THIN BODIES [patent_app_type] => utility [patent_app_number] => 18/142037 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142037 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142037
TRANSISTOR STRUCTURE WITH MULTIPLE VERTICAL THIN BODIES May 1, 2023 Pending
Array ( [id] => 18834003 [patent_doc_number] => 20230402530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/140030 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10518 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140030
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME Apr 26, 2023 Pending
Array ( [id] => 18540929 [patent_doc_number] => 20230246040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => VARIABLE ELECTRONIC ELEMENT AND CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/298520 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298520
VARIABLE ELECTRONIC ELEMENT AND CIRCUIT DEVICE Apr 10, 2023 Pending
Array ( [id] => 19384845 [patent_doc_number] => 20240274715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SEMICONDUCTOR DEVICE HAVING ANISOTROPIC LAYER [patent_app_type] => utility [patent_app_number] => 18/123995 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123995 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123995
SEMICONDUCTOR DEVICE HAVING ANISOTROPIC LAYER Mar 20, 2023 Pending
Array ( [id] => 18631874 [patent_doc_number] => 20230290779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => INTEGRATED CIRCUITS HAVING HETEROGENEOUS DEVICES THEREIN AND METHODS OF DESIGNING THE SAME [patent_app_type] => utility [patent_app_number] => 18/175765 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175765 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/175765
INTEGRATED CIRCUITS HAVING HETEROGENEOUS DEVICES THEREIN AND METHODS OF DESIGNING THE SAME Feb 27, 2023 Pending
Array ( [id] => 19086363 [patent_doc_number] => 20240113164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => FILM MODIFICATION FOR GATE CUT PROCESS [patent_app_type] => utility [patent_app_number] => 18/151792 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151792
FILM MODIFICATION FOR GATE CUT PROCESS Jan 8, 2023 Pending
Array ( [id] => 19252996 [patent_doc_number] => 20240203993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => LOW RESISTANCE METALIZATION FOR CONNECTING A VERTICAL TRANSPORT FET SINGLE-CPP INVERTER [patent_app_type] => utility [patent_app_number] => 18/065663 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065663 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065663
LOW RESISTANCE METALIZATION FOR CONNECTING A VERTICAL TRANSPORT FET SINGLE-CPP INVERTER Dec 13, 2022 Pending
Array ( [id] => 19237478 [patent_doc_number] => 20240194673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES [patent_app_type] => utility [patent_app_number] => 18/077394 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/077394
INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES Dec 7, 2022 Pending
Array ( [id] => 18570556 [patent_doc_number] => 20230260893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/975002 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975002
SEMICONDUCTOR DEVICE Oct 26, 2022 Pending
Array ( [id] => 18475694 [patent_doc_number] => 20230209982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => Display Device [patent_app_type] => utility [patent_app_number] => 17/964892 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18259 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964892 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964892
Display device Oct 11, 2022 Issued
Array ( [id] => 18283199 [patent_doc_number] => 20230098671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/952956 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952956
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF Sep 25, 2022 Pending
Array ( [id] => 19007799 [patent_doc_number] => 20240071870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING MAGNETIC VIAS AND BACKSIDE POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 17/894868 [patent_app_country] => US [patent_app_date] => 2022-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/894868
INTEGRATED CIRCUIT STRUCTURES HAVING MAGNETIC VIAS AND BACKSIDE POWER DELIVERY Aug 23, 2022 Pending
Array ( [id] => 18975411 [patent_doc_number] => 20240055503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/818880 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818880
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES Aug 9, 2022 Pending
Array ( [id] => 18943727 [patent_doc_number] => 20240038866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/875975 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875975
SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME Jul 27, 2022 Pending
Array ( [id] => 17986309 [patent_doc_number] => 20220352346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD OF FORMING DEVICES WITH STRAINED SOURCE/DRAIN STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/864033 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/864033
Method of forming devices with strained source/drain structures Jul 12, 2022 Issued
Array ( [id] => 18843178 [patent_doc_number] => 20230405582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MICROFLUIDIC CHANNEL STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/807896 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807896
Microfluidic channel structure and method Jun 20, 2022 Issued
Array ( [id] => 18849093 [patent_doc_number] => 20230411497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH OXIDE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/843004 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843004
SEMICONDUCTOR DEVICE STRUCTURE WITH OXIDE STRUCTURE AND METHOD FOR FORMING THE SAME Jun 16, 2022 Pending
Array ( [id] => 18848984 [patent_doc_number] => 20230411388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/843195 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843195
THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF Jun 16, 2022 Pending
Array ( [id] => 20118355 [patent_doc_number] => 12368073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Semiconductor device having air gap and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/842548 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 1175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842548
Semiconductor device having air gap and method for manufacturing the same Jun 15, 2022 Issued
Array ( [id] => 18490308 [patent_doc_number] => 20230217662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/837788 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837788 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837788
Semiconductor device and manufacturing method thereof Jun 9, 2022 Issued
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