
Kenneth T. Lam
Examiner (ID: 7525, Phone: (571)270-1862 , Office: P/2631 )
| Most Active Art Unit | 2631 |
| Art Unit(s) | 2631, 2611 |
| Total Applications | 1151 |
| Issued Applications | 929 |
| Pending Applications | 83 |
| Abandoned Applications | 150 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8647202
[patent_doc_number] => 20130032932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-07
[patent_title] => 'BONDED WIRE SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/195042
[patent_app_country] => US
[patent_app_date] => 2011-08-01
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Array
(
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[patent_issue_date] => 2012-05-10
[patent_title] => 'SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/195454 | SEMICONDUCTOR DEVICE | Jul 31, 2011 | Abandoned |
Array
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[patent_title] => 'Semiconductor system with fine pitch lead fingers and method of manufacturing thereof'
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Array
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[patent_issue_date] => 2012-02-02
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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Array
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[patent_title] => 'DOUBLE-SIDE EXPOSED SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD'
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Array
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[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'Power Semiconductor Module, Method for Producing a Power Semiconductor Module and a Housing Element for a Power Semiconductor Module'
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Array
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[id] => 8249155
[patent_doc_number] => 20120153480
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[patent_title] => 'Metallization Systems of Semiconductor Devices Comprising a Copper/Silicon Compound as a Barrier Material'
[patent_app_type] => utility
[patent_app_number] => 13/192164
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Array
(
[id] => 8572283
[patent_doc_number] => 08338933
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[patent_issue_date] => 2012-12-25
[patent_title] => 'Three-dimensional package structure'
[patent_app_type] => utility
[patent_app_number] => 13/188774
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Array
(
[id] => 10898773
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[patent_app_type] => utility
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Array
(
[id] => 7573616
[patent_doc_number] => 20110269272
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[patent_title] => 'MICROELECTRONIC PACKAGES AND METHODS THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 13/183122
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/183122 | Microelectronic packages and methods therefor | Jul 13, 2011 | Issued |
Array
(
[id] => 8544060
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[patent_title] => 'Semiconductor chip with post-passivation scheme formed over passivation layer'
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Array
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[patent_title] => 'Semiconductor device with increased I/O leadframe'
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Array
(
[id] => 8955832
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Array
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Array
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Array
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Array
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Array
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