Search

Kent Yip

Examiner (ID: 851, Phone: (571)270-5244 , Office: P/2676 )

Most Active Art Unit
2676
Art Unit(s)
2676, 2672, 2625, 2681
Total Applications
653
Issued Applications
467
Pending Applications
37
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1542838 [patent_doc_number] => 06372666 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Process for producing dielectric thin films' [patent_app_type] => B1 [patent_app_number] => 09/379866 [patent_app_country] => US [patent_app_date] => 1999-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 7924 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372666.pdf [firstpage_image] =>[orig_patent_app_number] => 09379866 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/379866
Process for producing dielectric thin films Aug 23, 1999 Issued
Array ( [id] => 4302981 [patent_doc_number] => 06187665 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Process for deuterium passivation and hot carrier immunity' [patent_app_type] => 1 [patent_app_number] => 9/378856 [patent_app_country] => US [patent_app_date] => 1999-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4933 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187665.pdf [firstpage_image] =>[orig_patent_app_number] => 378856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/378856
Process for deuterium passivation and hot carrier immunity Aug 22, 1999 Issued
Array ( [id] => 4405814 [patent_doc_number] => 06232218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Etch stop for use in etching of silicon oxide' [patent_app_type] => 1 [patent_app_number] => 9/377100 [patent_app_country] => US [patent_app_date] => 1999-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3917 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232218.pdf [firstpage_image] =>[orig_patent_app_number] => 377100 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/377100
Etch stop for use in etching of silicon oxide Aug 18, 1999 Issued
Array ( [id] => 1545481 [patent_doc_number] => 06444593 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Surface treatment of low-K SiOF to prevent metal interaction' [patent_app_type] => B1 [patent_app_number] => 09/373483 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444593.pdf [firstpage_image] =>[orig_patent_app_number] => 09373483 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/373483
Surface treatment of low-K SiOF to prevent metal interaction Aug 11, 1999 Issued
Array ( [id] => 4154067 [patent_doc_number] => 06103567 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method of fabricating dielectric layer' [patent_app_type] => 1 [patent_app_number] => 9/371646 [patent_app_country] => US [patent_app_date] => 1999-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2921 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103567.pdf [firstpage_image] =>[orig_patent_app_number] => 371646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/371646
Method of fabricating dielectric layer Aug 9, 1999 Issued
Array ( [id] => 4292900 [patent_doc_number] => 06180524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Metal deposit process' [patent_app_type] => 1 [patent_app_number] => 9/371296 [patent_app_country] => US [patent_app_date] => 1999-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2038 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180524.pdf [firstpage_image] =>[orig_patent_app_number] => 371296 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/371296
Metal deposit process Aug 8, 1999 Issued
Array ( [id] => 4153430 [patent_doc_number] => 06107167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Simplified method of patterning polysilicon gate in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/366216 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2536 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107167.pdf [firstpage_image] =>[orig_patent_app_number] => 366216 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/366216
Simplified method of patterning polysilicon gate in a semiconductor device Aug 1, 1999 Issued
Array ( [id] => 4081437 [patent_doc_number] => 06054397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'BPSG planarization method having improved planarity and reduced chatter mark defects' [patent_app_type] => 1 [patent_app_number] => 9/363306 [patent_app_country] => US [patent_app_date] => 1999-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1132 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054397.pdf [firstpage_image] =>[orig_patent_app_number] => 363306 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/363306
BPSG planarization method having improved planarity and reduced chatter mark defects Jul 27, 1999 Issued
Array ( [id] => 4155917 [patent_doc_number] => 06114259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage' [patent_app_type] => 1 [patent_app_number] => 9/362645 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6203 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114259.pdf [firstpage_image] =>[orig_patent_app_number] => 362645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/362645
Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage Jul 26, 1999 Issued
Array ( [id] => 4246661 [patent_doc_number] => 06136706 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Process for making titanium' [patent_app_type] => 1 [patent_app_number] => 9/362915 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3307 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136706.pdf [firstpage_image] =>[orig_patent_app_number] => 362915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/362915
Process for making titanium Jul 26, 1999 Issued
Array ( [id] => 4259846 [patent_doc_number] => 06258734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Method for patterning semiconductor devices on a silicon substrate using oxynitride film' [patent_app_type] => 1 [patent_app_number] => 9/356006 [patent_app_country] => US [patent_app_date] => 1999-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2279 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/258/06258734.pdf [firstpage_image] =>[orig_patent_app_number] => 356006 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/356006
Method for patterning semiconductor devices on a silicon substrate using oxynitride film Jul 15, 1999 Issued
Array ( [id] => 1278143 [patent_doc_number] => 06645884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Method of forming a silicon nitride layer on a substrate' [patent_app_type] => B1 [patent_app_number] => 09/350810 [patent_app_country] => US [patent_app_date] => 1999-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 16280 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/645/06645884.pdf [firstpage_image] =>[orig_patent_app_number] => 09350810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/350810
Method of forming a silicon nitride layer on a substrate Jul 8, 1999 Issued
Array ( [id] => 4095401 [patent_doc_number] => 06096656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Formation of microchannels from low-temperature plasma-deposited silicon oxynitride' [patent_app_type] => 1 [patent_app_number] => 9/339715 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 41 [patent_no_of_words] => 9453 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096656.pdf [firstpage_image] =>[orig_patent_app_number] => 339715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339715
Formation of microchannels from low-temperature plasma-deposited silicon oxynitride Jun 23, 1999 Issued
Array ( [id] => 4155662 [patent_doc_number] => 06114241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Method of manufacturing a semiconductor device capable of reducing contact resistance' [patent_app_type] => 1 [patent_app_number] => 9/338525 [patent_app_country] => US [patent_app_date] => 1999-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3550 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114241.pdf [firstpage_image] =>[orig_patent_app_number] => 338525 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/338525
Method of manufacturing a semiconductor device capable of reducing contact resistance Jun 22, 1999 Issued
Array ( [id] => 4233822 [patent_doc_number] => 06117799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Deposition of super thin PECVD SiO.sub.2 in multiple deposition station system' [patent_app_type] => 1 [patent_app_number] => 9/337696 [patent_app_country] => US [patent_app_date] => 1999-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2119 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/117/06117799.pdf [firstpage_image] =>[orig_patent_app_number] => 337696 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/337696
Deposition of super thin PECVD SiO.sub.2 in multiple deposition station system Jun 20, 1999 Issued
Array ( [id] => 4354252 [patent_doc_number] => 06218280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Method and apparatus for producing group-III nitrides' [patent_app_type] => 1 [patent_app_number] => 9/336286 [patent_app_country] => US [patent_app_date] => 1999-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9565 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218280.pdf [firstpage_image] =>[orig_patent_app_number] => 336286 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/336286
Method and apparatus for producing group-III nitrides Jun 17, 1999 Issued
Array ( [id] => 4153722 [patent_doc_number] => 06107187 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method for forming a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/334906 [patent_app_country] => US [patent_app_date] => 1999-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107187.pdf [firstpage_image] =>[orig_patent_app_number] => 334906 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334906
Method for forming a semiconductor device Jun 16, 1999 Issued
Array ( [id] => 1485296 [patent_doc_number] => 06365489 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Creation of subresolution features via flow characteristics' [patent_app_type] => B1 [patent_app_number] => 09/333796 [patent_app_country] => US [patent_app_date] => 1999-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5177 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365489.pdf [firstpage_image] =>[orig_patent_app_number] => 09333796 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/333796
Creation of subresolution features via flow characteristics Jun 14, 1999 Issued
Array ( [id] => 4216110 [patent_doc_number] => 06087278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Method for fabricating semiconductor devices having an HDP-CVD oxide layer as a passivation layer' [patent_app_type] => 1 [patent_app_number] => 9/327678 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2377 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087278.pdf [firstpage_image] =>[orig_patent_app_number] => 327678 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327678
Method for fabricating semiconductor devices having an HDP-CVD oxide layer as a passivation layer Jun 7, 1999 Issued
Array ( [id] => 1594789 [patent_doc_number] => 06383955 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Silicone polymer insulation film on semiconductor substrate and method for forming the film' [patent_app_type] => B1 [patent_app_number] => 09/326848 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9943 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383955.pdf [firstpage_image] =>[orig_patent_app_number] => 09326848 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/326848
Silicone polymer insulation film on semiconductor substrate and method for forming the film Jun 6, 1999 Issued
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