Kent Yip

Array ( [id] => 4313242 [patent_doc_number] => 06242365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Method for preventing film deposited on semiconductor wafer from cracking' [patent_app_type] => 1 [patent_app_number] => 9/325915 [patent_app_country] => US [patent_app_date] => 1999-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2088 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242365.pdf [firstpage_image] =>[orig_patent_app_number] => 325915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4181629 [patent_doc_number] => 06020261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Process for forming high aspect ratio circuit features' [patent_app_type] => 1 [patent_app_number] => 9/323256 [patent_app_country] => US [patent_app_date] => 1999-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1549 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020261.pdf [firstpage_image] =>[orig_patent_app_number] => 323256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4183738 [patent_doc_number] => 06159848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method of manufacturing a semiconductor device having a high melting point metal film' [patent_app_type] => 1 [patent_app_number] => 9/316035 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3509 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159848.pdf [firstpage_image] =>[orig_patent_app_number] => 316035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3911624 [patent_doc_number] => 06001746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Method of forming an undoped silicate glass layer on a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/314928 [patent_app_country] => US [patent_app_date] => 1999-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1566 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/001/06001746.pdf [firstpage_image] =>[orig_patent_app_number] => 314928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4131612 [patent_doc_number] => 06121122 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Method of contacting a silicide-based schottky diode' [patent_app_type] => 1 [patent_app_number] => 9/312945 [patent_app_country] => US [patent_app_date] => 1999-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1941 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121122.pdf [firstpage_image] =>[orig_patent_app_number] => 312945 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4081452 [patent_doc_number] => 06054398 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Semiconductor interconnect barrier for fluorinated dielectrics' [patent_app_type] => 1 [patent_app_number] => 9/311735 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2665 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054398.pdf [firstpage_image] =>[orig_patent_app_number] => 311735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191444 [patent_doc_number] => 06043152 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Method to reduce metal damage in the HDP-CVD process by using a sacrificial dielectric film' [patent_app_type] => 1 [patent_app_number] => 9/310776 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2319 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043152.pdf [firstpage_image] =>[orig_patent_app_number] => 310776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178249 [patent_doc_number] => 06037255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Method for making integrated circuit having polymer interlayer dielectric' [patent_app_type] => 1 [patent_app_number] => 9/310656 [patent_app_country] => US [patent_app_date] => 1999-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3532 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037255.pdf [firstpage_image] =>[orig_patent_app_number] => 310656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178294 [patent_doc_number] => 06037258 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Method of forming a smooth copper seed layer for a copper damascene structure' [patent_app_type] => 1 [patent_app_number] => 9/307206 [patent_app_country] => US [patent_app_date] => 1999-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2687 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037258.pdf [firstpage_image] =>[orig_patent_app_number] => 307206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4107782 [patent_doc_number] => 06057218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method for simultaneously manufacturing poly gate and polycide gate' [patent_app_type] => 1 [patent_app_number] => 9/307404 [patent_app_country] => US [patent_app_date] => 1999-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2794 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057218.pdf [firstpage_image] =>[orig_patent_app_number] => 307404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4207237 [patent_doc_number] => 06028013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Moisture repellant integrated circuit dielectric material combination' [patent_app_type] => 1 [patent_app_number] => 9/306239 [patent_app_country] => US [patent_app_date] => 1999-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3035 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028013.pdf [firstpage_image] =>[orig_patent_app_number] => 306239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4102208 [patent_doc_number] => 06100181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Low dielectric constant coating of conductive material in a damascene process for semiconductors' [patent_app_type] => 1 [patent_app_number] => 9/305906 [patent_app_country] => US [patent_app_date] => 1999-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2955 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100181.pdf [firstpage_image] =>[orig_patent_app_number] => 305906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4153694 [patent_doc_number] => 06107185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Conductive material adhesion enhancement in damascene process for semiconductors' [patent_app_type] => 1 [patent_app_number] => 9/302036 [patent_app_country] => US [patent_app_date] => 1999-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3060 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107185.pdf [firstpage_image] =>[orig_patent_app_number] => 302036 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7631343 [patent_doc_number] => 06635589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Methods of heat treatment and heat treatment apparatus for silicon oxide films' [patent_app_type] => B2 [patent_app_number] => 09/286999 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 24192 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635589.pdf [firstpage_image] =>[orig_patent_app_number] => 09286999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4406180 [patent_doc_number] => 06171942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Methods of forming electrically conductive lines in integrated circuit memories using self-aligned silicide blocking layers' [patent_app_type] => 1 [patent_app_number] => 9/283226 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2491 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171942.pdf [firstpage_image] =>[orig_patent_app_number] => 283226 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4294530 [patent_doc_number] => 06197705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Method of silicon oxide and silicon glass films deposition' [patent_app_type] => 1 [patent_app_number] => 9/270598 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6212 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/197/06197705.pdf [firstpage_image] =>[orig_patent_app_number] => 270598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4406165 [patent_doc_number] => 06232245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method of forming interlayer film' [patent_app_type] => 1 [patent_app_number] => 9/265232 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 7132 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232245.pdf [firstpage_image] =>[orig_patent_app_number] => 265232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4420763 [patent_doc_number] => 06225228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Silicon oxide co-deposition/etching process' [patent_app_type] => 1 [patent_app_number] => 9/257401 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2945 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225228.pdf [firstpage_image] =>[orig_patent_app_number] => 257401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4407695 [patent_doc_number] => 06239027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method using a photoresist residue' [patent_app_type] => 1 [patent_app_number] => 9/256566 [patent_app_country] => US [patent_app_date] => 1999-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2027 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239027.pdf [firstpage_image] =>[orig_patent_app_number] => 256566 [rel_patent_id] =>[rel_patent_doc_number] =>)