Search

Kent Yip

Examiner (ID: 851, Phone: (571)270-5244 , Office: P/2676 )

Most Active Art Unit
2676
Art Unit(s)
2676, 2672, 2625, 2681
Total Applications
653
Issued Applications
467
Pending Applications
37
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1523832 [patent_doc_number] => 06352946 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'High-pressure anneal process for integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/256634 [patent_app_country] => US [patent_app_date] => 1999-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1754 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/352/06352946.pdf [firstpage_image] =>[orig_patent_app_number] => 09256634 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/256634
High-pressure anneal process for integrated circuits Feb 23, 1999 Issued
Array ( [id] => 4102339 [patent_doc_number] => 06100190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method of fabricating semiconductor device, and semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/251425 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4502 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100190.pdf [firstpage_image] =>[orig_patent_app_number] => 251425 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251425
Method of fabricating semiconductor device, and semiconductor device Feb 16, 1999 Issued
Array ( [id] => 4350995 [patent_doc_number] => 06291341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method for PECVD deposition of selected material films' [patent_app_type] => 1 [patent_app_number] => 9/249478 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5045 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291341.pdf [firstpage_image] =>[orig_patent_app_number] => 249478 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249478
Method for PECVD deposition of selected material films Feb 11, 1999 Issued
09/243156 SILICONE POLYMER INSULATION FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR FORMING THE FILM Feb 1, 1999 Abandoned
Array ( [id] => 4408890 [patent_doc_number] => 06265328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Wafer edge engineering method and device' [patent_app_type] => 1 [patent_app_number] => 9/239477 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5651 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265328.pdf [firstpage_image] =>[orig_patent_app_number] => 239477 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/239477
Wafer edge engineering method and device Jan 27, 1999 Issued
Array ( [id] => 4236064 [patent_doc_number] => 06165905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Methods for making reliable via structures having hydrophobic inner wall surfaces' [patent_app_type] => 1 [patent_app_number] => 9/234235 [patent_app_country] => US [patent_app_date] => 1999-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3647 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/165/06165905.pdf [firstpage_image] =>[orig_patent_app_number] => 234235 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/234235
Methods for making reliable via structures having hydrophobic inner wall surfaces Jan 19, 1999 Issued
Array ( [id] => 4084257 [patent_doc_number] => 06162711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing' [patent_app_type] => 1 [patent_app_number] => 9/232114 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162711.pdf [firstpage_image] =>[orig_patent_app_number] => 232114 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/232114
In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing Jan 14, 1999 Issued
Array ( [id] => 1441110 [patent_doc_number] => 06335295 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Flame-free wet oxidation' [patent_app_type] => B1 [patent_app_number] => 09/231265 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3991 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335295.pdf [firstpage_image] =>[orig_patent_app_number] => 09231265 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/231265
Flame-free wet oxidation Jan 14, 1999 Issued
Array ( [id] => 4247907 [patent_doc_number] => 06221788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Semiconductor and a method for manufacturing an oxide film on the surface of a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 9/213626 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7052 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221788.pdf [firstpage_image] =>[orig_patent_app_number] => 213626 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213626
Semiconductor and a method for manufacturing an oxide film on the surface of a semiconductor substrate Dec 17, 1998 Issued
Array ( [id] => 4246098 [patent_doc_number] => 06136671 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Method for forming gate oxide layers' [patent_app_type] => 1 [patent_app_number] => 9/212214 [patent_app_country] => US [patent_app_date] => 1998-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1367 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136671.pdf [firstpage_image] =>[orig_patent_app_number] => 212214 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212214
Method for forming gate oxide layers Dec 15, 1998 Issued
Array ( [id] => 4354399 [patent_doc_number] => 06218290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Copper dendrite prevention by chemical removal of dielectric' [patent_app_type] => 1 [patent_app_number] => 9/199267 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218290.pdf [firstpage_image] =>[orig_patent_app_number] => 199267 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199267
Copper dendrite prevention by chemical removal of dielectric Nov 24, 1998 Issued
Array ( [id] => 4215072 [patent_doc_number] => 06110825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Process for forming front-back through contacts in micro-integrated electronic devices' [patent_app_type] => 1 [patent_app_number] => 9/200496 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1974 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110825.pdf [firstpage_image] =>[orig_patent_app_number] => 200496 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/200496
Process for forming front-back through contacts in micro-integrated electronic devices Nov 24, 1998 Issued
Array ( [id] => 4236006 [patent_doc_number] => 06165901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Method of fabricating self-aligned contact' [patent_app_type] => 1 [patent_app_number] => 9/199970 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2739 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/165/06165901.pdf [firstpage_image] =>[orig_patent_app_number] => 199970 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199970
Method of fabricating self-aligned contact Nov 24, 1998 Issued
Array ( [id] => 4417677 [patent_doc_number] => 06194327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Rapid thermal etch and rapid thermal oxidation' [patent_app_type] => 1 [patent_app_number] => 9/189920 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3146 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194327.pdf [firstpage_image] =>[orig_patent_app_number] => 189920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189920
Rapid thermal etch and rapid thermal oxidation Nov 11, 1998 Issued
Array ( [id] => 4084395 [patent_doc_number] => 06162721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Semiconductor processing methods' [patent_app_type] => 1 [patent_app_number] => 9/183486 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2350 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162721.pdf [firstpage_image] =>[orig_patent_app_number] => 183486 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183486
Semiconductor processing methods Oct 29, 1998 Issued
Array ( [id] => 1435935 [patent_doc_number] => 06355578 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Manufacturing method for a composite device' [patent_app_type] => B1 [patent_app_number] => 09/179913 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 4903 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/355/06355578.pdf [firstpage_image] =>[orig_patent_app_number] => 09179913 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/179913
Manufacturing method for a composite device Oct 26, 1998 Issued
Array ( [id] => 4406217 [patent_doc_number] => 06171945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'CVD nanoporous silica low dielectric constant films' [patent_app_type] => 1 [patent_app_number] => 9/177044 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 29 [patent_no_of_words] => 10718 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171945.pdf [firstpage_image] =>[orig_patent_app_number] => 177044 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177044
CVD nanoporous silica low dielectric constant films Oct 21, 1998 Issued
Array ( [id] => 4182829 [patent_doc_number] => 06150265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Apparatus for forming materials' [patent_app_type] => 1 [patent_app_number] => 9/167625 [patent_app_country] => US [patent_app_date] => 1998-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3238 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150265.pdf [firstpage_image] =>[orig_patent_app_number] => 167625 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/167625
Apparatus for forming materials Oct 5, 1998 Issued
Array ( [id] => 1440010 [patent_doc_number] => 06495407 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Method of making an article comprising an oxide layer on a GaAs-based semiconductor body' [patent_app_type] => B1 [patent_app_number] => 09/156719 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 5044 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495407.pdf [firstpage_image] =>[orig_patent_app_number] => 09156719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156719
Method of making an article comprising an oxide layer on a GaAs-based semiconductor body Sep 17, 1998 Issued
Array ( [id] => 4182917 [patent_doc_number] => 06150271 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Differential temperature control in chemical mechanical polishing processes' [patent_app_type] => 1 [patent_app_number] => 9/151077 [patent_app_country] => US [patent_app_date] => 1998-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2704 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150271.pdf [firstpage_image] =>[orig_patent_app_number] => 151077 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/151077
Differential temperature control in chemical mechanical polishing processes Sep 9, 1998 Issued
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