Search

Ket D. Dang

Examiner (ID: 18985, Phone: (571)270-7827 , Office: P/3742 )

Most Active Art Unit
3742
Art Unit(s)
3742, 3761
Total Applications
696
Issued Applications
407
Pending Applications
43
Abandoned Applications
258

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4190989 [patent_doc_number] => 06043122 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Three-dimensional non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 9/334393 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 39 [patent_no_of_words] => 5451 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043122.pdf [firstpage_image] =>[orig_patent_app_number] => 334393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334393
Three-dimensional non-volatile memory Jun 15, 1999 Issued
Array ( [id] => 4063769 [patent_doc_number] => 06008082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry' [patent_app_type] => 1 [patent_app_number] => 9/198029 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2473 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008082.pdf [firstpage_image] =>[orig_patent_app_number] => 198029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198029
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry Nov 22, 1998 Issued
Array ( [id] => 3885922 [patent_doc_number] => 05893734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Method for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contacts' [patent_app_type] => 1 [patent_app_number] => 9/152311 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5653 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 531 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/893/05893734.pdf [firstpage_image] =>[orig_patent_app_number] => 152311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152311
Method for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contacts Sep 13, 1998 Issued
Array ( [id] => 4057114 [patent_doc_number] => 05895239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Method for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contacts' [patent_app_type] => 1 [patent_app_number] => 9/152313 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5390 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 597 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895239.pdf [firstpage_image] =>[orig_patent_app_number] => 152313 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152313
Method for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contacts Sep 13, 1998 Issued
Array ( [id] => 4129535 [patent_doc_number] => 06033920 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Method of manufacturing a high dielectric constant capacitor' [patent_app_type] => 1 [patent_app_number] => 9/122492 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 2948 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/033/06033920.pdf [firstpage_image] =>[orig_patent_app_number] => 122492 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/122492
Method of manufacturing a high dielectric constant capacitor Jul 23, 1998 Issued
Array ( [id] => 3994151 [patent_doc_number] => 05918120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Method for fabricating capacitor-over-bit line (COB) dynamic random access memory (DRAM) using tungsten landing plug contacts and Ti/TiN bit lines' [patent_app_type] => 1 [patent_app_number] => 9/121711 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4372 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918120.pdf [firstpage_image] =>[orig_patent_app_number] => 121711 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121711
Method for fabricating capacitor-over-bit line (COB) dynamic random access memory (DRAM) using tungsten landing plug contacts and Ti/TiN bit lines Jul 23, 1998 Issued
09/106332 NEW METHOD FOR FABRICATING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELLS WITH MINIMUM ACTIVE CELL AREAS USING SIDEWALL-SPACER BIT LINES Jun 28, 1998 Issued
Array ( [id] => 4137001 [patent_doc_number] => 06034402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/095043 [patent_app_country] => US [patent_app_date] => 1998-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 9486 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034402.pdf [firstpage_image] =>[orig_patent_app_number] => 095043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/095043
Semiconductor device Jun 9, 1998 Issued
09/092041 METHOD FOR PRODUCING DYNAMIC RAM Jun 4, 1998 Issued
Array ( [id] => 4113853 [patent_doc_number] => 06046082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/089541 [patent_app_country] => US [patent_app_date] => 1998-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4075 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046082.pdf [firstpage_image] =>[orig_patent_app_number] => 089541 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089541
Method for manufacturing semiconductor device Jun 2, 1998 Issued
Array ( [id] => 4069695 [patent_doc_number] => 05933725 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Word line resistance reduction method and design for high density memory with relaxed metal pitch' [patent_app_type] => 1 [patent_app_number] => 9/085612 [patent_app_country] => US [patent_app_date] => 1998-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5074 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933725.pdf [firstpage_image] =>[orig_patent_app_number] => 085612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085612
Word line resistance reduction method and design for high density memory with relaxed metal pitch May 26, 1998 Issued
09/075098 METHOD FOR FABRICATING CAPACITORS OF A DYNAMIC RANDOM ACCESS MEMORY May 6, 1998 Issued
Array ( [id] => 4129826 [patent_doc_number] => 06033939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Method for providing electrically fusible links in copper interconnection' [patent_app_type] => 1 [patent_app_number] => 9/063992 [patent_app_country] => US [patent_app_date] => 1998-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/033/06033939.pdf [firstpage_image] =>[orig_patent_app_number] => 063992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063992
Method for providing electrically fusible links in copper interconnection Apr 20, 1998 Issued
09/063211 DOUBLE CODING PROCESSES FOR MASK READ ONLY MEMORY (ROM) DEVICES Apr 19, 1998 Issued
Array ( [id] => 3944012 [patent_doc_number] => 05998250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Compound electrode stack capacitor' [patent_app_type] => 1 [patent_app_number] => 9/062031 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 4471 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998250.pdf [firstpage_image] =>[orig_patent_app_number] => 062031 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/062031
Compound electrode stack capacitor Apr 16, 1998 Issued
Array ( [id] => 3896434 [patent_doc_number] => 05897352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method of manufacturing hemispherical grained polysilicon with improved adhesion and reduced capacitance depletion' [patent_app_type] => 1 [patent_app_number] => 9/047543 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3241 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897352.pdf [firstpage_image] =>[orig_patent_app_number] => 047543 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047543
Method of manufacturing hemispherical grained polysilicon with improved adhesion and reduced capacitance depletion Mar 24, 1998 Issued
Array ( [id] => 3950772 [patent_doc_number] => 05899741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Method of manufacturing low resistance and low junction leakage contact' [patent_app_type] => 1 [patent_app_number] => 9/040432 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1543 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/899/05899741.pdf [firstpage_image] =>[orig_patent_app_number] => 040432 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040432
Method of manufacturing low resistance and low junction leakage contact Mar 17, 1998 Issued
Array ( [id] => 4235396 [patent_doc_number] => 06143605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Method for making a DRAM capacitor using a double layer of insitu doped polysilicon and undoped amorphous polysilicon with HSG polysilicon' [patent_app_type] => 1 [patent_app_number] => 9/041863 [patent_app_country] => US [patent_app_date] => 1998-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1788 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143605.pdf [firstpage_image] =>[orig_patent_app_number] => 041863 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041863
Method for making a DRAM capacitor using a double layer of insitu doped polysilicon and undoped amorphous polysilicon with HSG polysilicon Mar 11, 1998 Issued
Array ( [id] => 4070316 [patent_doc_number] => 05970337 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Ferroelectric film capacitor with intergranular insulation' [patent_app_type] => 1 [patent_app_number] => 9/027340 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 29 [patent_no_of_words] => 7631 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970337.pdf [firstpage_image] =>[orig_patent_app_number] => 027340 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027340
Ferroelectric film capacitor with intergranular insulation Feb 19, 1998 Issued
Array ( [id] => 4002677 [patent_doc_number] => 06004841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Fabrication process for MOSFET devices and a reproducible capacitor structure' [patent_app_type] => 1 [patent_app_number] => 9/022408 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2870 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/004/06004841.pdf [firstpage_image] =>[orig_patent_app_number] => 022408 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/022408
Fabrication process for MOSFET devices and a reproducible capacitor structure Feb 11, 1998 Issued
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