Search

Ket D. Dang

Examiner (ID: 1288, Phone: (571)270-7827 , Office: P/3742 )

Most Active Art Unit
3742
Art Unit(s)
3742, 3761
Total Applications
700
Issued Applications
410
Pending Applications
39
Abandoned Applications
261

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3876861 [patent_doc_number] => 05804454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Insulation film-forming method for semiconductor device manufacturing wherein SiOx (O.ltoreq.x.ltoreq.1.8) is evaporated' [patent_app_type] => 1 [patent_app_number] => 8/451675 [patent_app_country] => US [patent_app_date] => 1995-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 6750 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/804/05804454.pdf [firstpage_image] =>[orig_patent_app_number] => 451675 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/451675
Insulation film-forming method for semiconductor device manufacturing wherein SiOx (O.ltoreq.x.ltoreq.1.8) is evaporated May 25, 1995 Issued
08/450656 SEMICONDUCTOR DEVICE APPLIED TO COMPOSITE INSULATIVE FILM AND MANUFACTURING METHOD THEREOF May 24, 1995 Abandoned
08/445029 HEAT TREATMENT OF SI SINGLE CRYSTAL May 18, 1995 Abandoned
Array ( [id] => 3731354 [patent_doc_number] => 05665656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Method and apparatus for polishing a semiconductor substrate wafer' [patent_app_type] => 1 [patent_app_number] => 8/443133 [patent_app_country] => US [patent_app_date] => 1995-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4719 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/665/05665656.pdf [firstpage_image] =>[orig_patent_app_number] => 443133 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/443133
Method and apparatus for polishing a semiconductor substrate wafer May 16, 1995 Issued
Array ( [id] => 3587504 [patent_doc_number] => 05550091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-27 [patent_title] => 'Method of sputtering a silicon nitride film' [patent_app_type] => 1 [patent_app_number] => 8/437606 [patent_app_country] => US [patent_app_date] => 1995-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 11218 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/550/05550091.pdf [firstpage_image] =>[orig_patent_app_number] => 437606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/437606
Method of sputtering a silicon nitride film May 8, 1995 Issued
Array ( [id] => 3601721 [patent_doc_number] => 05578528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Method of fabrication glass diaphragm on silicon macrostructure' [patent_app_type] => 1 [patent_app_number] => 8/432727 [patent_app_country] => US [patent_app_date] => 1995-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3594 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/578/05578528.pdf [firstpage_image] =>[orig_patent_app_number] => 432727 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/432727
Method of fabrication glass diaphragm on silicon macrostructure May 1, 1995 Issued
Array ( [id] => 3586190 [patent_doc_number] => 05552346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Planarization and etch back process for semiconductor layers' [patent_app_type] => 1 [patent_app_number] => 8/429811 [patent_app_country] => US [patent_app_date] => 1995-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3142 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/552/05552346.pdf [firstpage_image] =>[orig_patent_app_number] => 429811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/429811
Planarization and etch back process for semiconductor layers Apr 26, 1995 Issued
Array ( [id] => 3509754 [patent_doc_number] => 05587344 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Method for fabricating an oxynitride film for use in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/429144 [patent_app_country] => US [patent_app_date] => 1995-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3793 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587344.pdf [firstpage_image] =>[orig_patent_app_number] => 429144 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/429144
Method for fabricating an oxynitride film for use in a semiconductor device Apr 25, 1995 Issued
Array ( [id] => 3705579 [patent_doc_number] => 05654244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Process for producing semiconductor strain-sensitive sensor' [patent_app_type] => 1 [patent_app_number] => 8/427960 [patent_app_country] => US [patent_app_date] => 1995-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 4152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654244.pdf [firstpage_image] =>[orig_patent_app_number] => 427960 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/427960
Process for producing semiconductor strain-sensitive sensor Apr 25, 1995 Issued
Array ( [id] => 3950928 [patent_doc_number] => 05899752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Method for in-situ cleaning of native oxide from silicon surfaces' [patent_app_type] => 1 [patent_app_number] => 8/429432 [patent_app_country] => US [patent_app_date] => 1995-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3452 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/899/05899752.pdf [firstpage_image] =>[orig_patent_app_number] => 429432 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/429432
Method for in-situ cleaning of native oxide from silicon surfaces Apr 25, 1995 Issued
Array ( [id] => 3894633 [patent_doc_number] => 05750434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Surface polishing of silicon carbide electronic device substrate using CEO.sub.2' [patent_app_type] => 1 [patent_app_number] => 8/423841 [patent_app_country] => US [patent_app_date] => 1995-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1759 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/750/05750434.pdf [firstpage_image] =>[orig_patent_app_number] => 423841 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/423841
Surface polishing of silicon carbide electronic device substrate using CEO.sub.2 Apr 17, 1995 Issued
Array ( [id] => 3648039 [patent_doc_number] => 05639699 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Focused ion beam deposition using TMCTS' [patent_app_type] => 1 [patent_app_number] => 8/420153 [patent_app_country] => US [patent_app_date] => 1995-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 99 [patent_no_of_words] => 26123 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/639/05639699.pdf [firstpage_image] =>[orig_patent_app_number] => 420153 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/420153
Focused ion beam deposition using TMCTS Apr 10, 1995 Issued
Array ( [id] => 3529708 [patent_doc_number] => 05583077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Integrated dual layer passivation process to suppress stress-induced metal voids' [patent_app_type] => 1 [patent_app_number] => 8/416161 [patent_app_country] => US [patent_app_date] => 1995-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1497 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583077.pdf [firstpage_image] =>[orig_patent_app_number] => 416161 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/416161
Integrated dual layer passivation process to suppress stress-induced metal voids Apr 3, 1995 Issued
Array ( [id] => 3613308 [patent_doc_number] => 05510290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Method for forming a field oxide layer in a semiconductor device which prevents bird beak by nitradation of pad oxide' [patent_app_type] => 1 [patent_app_number] => 8/414109 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1169 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/510/05510290.pdf [firstpage_image] =>[orig_patent_app_number] => 414109 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414109
Method for forming a field oxide layer in a semiconductor device which prevents bird beak by nitradation of pad oxide Mar 30, 1995 Issued
Array ( [id] => 1544983 [patent_doc_number] => 06444480 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Thermal treatment apparatus, semiconductor device fabrication apparatus, load-lock chamber, and method of fabricating semiconductor device' [patent_app_type] => B1 [patent_app_number] => 08/413163 [patent_app_country] => US [patent_app_date] => 1995-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2732 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444480.pdf [firstpage_image] =>[orig_patent_app_number] => 08413163 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/413163
Thermal treatment apparatus, semiconductor device fabrication apparatus, load-lock chamber, and method of fabricating semiconductor device Mar 28, 1995 Issued
Array ( [id] => 3994548 [patent_doc_number] => 05918147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Process for forming a semiconductor device with an antireflective layer' [patent_app_type] => 1 [patent_app_number] => 8/413021 [patent_app_country] => US [patent_app_date] => 1995-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3127 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918147.pdf [firstpage_image] =>[orig_patent_app_number] => 413021 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/413021
Process for forming a semiconductor device with an antireflective layer Mar 28, 1995 Issued
Array ( [id] => 3782344 [patent_doc_number] => 05821171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Article comprising a gallium layer on a GaAs-based semiconductor, and method of making the article' [patent_app_type] => 1 [patent_app_number] => 8/408678 [patent_app_country] => US [patent_app_date] => 1995-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 7389 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821171.pdf [firstpage_image] =>[orig_patent_app_number] => 408678 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/408678
Article comprising a gallium layer on a GaAs-based semiconductor, and method of making the article Mar 21, 1995 Issued
Array ( [id] => 4086265 [patent_doc_number] => 06133050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue' [patent_app_type] => 1 [patent_app_number] => 8/405885 [patent_app_country] => US [patent_app_date] => 1995-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 15377 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133050.pdf [firstpage_image] =>[orig_patent_app_number] => 405885 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405885
UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue Mar 16, 1995 Issued
Array ( [id] => 3890835 [patent_doc_number] => 05894064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Solution routes to metal oxide films through ester elimination reactions' [patent_app_type] => 1 [patent_app_number] => 8/402584 [patent_app_country] => US [patent_app_date] => 1995-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 3711 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894064.pdf [firstpage_image] =>[orig_patent_app_number] => 402584 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/402584
Solution routes to metal oxide films through ester elimination reactions Mar 12, 1995 Issued
Array ( [id] => 4107003 [patent_doc_number] => 06022806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Method of forming a film in recess by vapor phase growth' [patent_app_type] => 1 [patent_app_number] => 8/401904 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 6885 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/022/06022806.pdf [firstpage_image] =>[orig_patent_app_number] => 401904 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/401904
Method of forming a film in recess by vapor phase growth Mar 9, 1995 Issued
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