Search

Kevin A. Kriess

Examiner (ID: 17903)

Most Active Art Unit
2316
Art Unit(s)
2787, 2316, 2307, 2755
Total Applications
665
Issued Applications
518
Pending Applications
18
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2843863 [patent_doc_number] => 05129073 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Dynamic RAM with read-write/refresh mode judging capability' [patent_app_type] => 1 [patent_app_number] => 7/759640 [patent_app_country] => US [patent_app_date] => 1991-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2305 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/129/05129073.pdf [firstpage_image] =>[orig_patent_app_number] => 759640 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/759640
Dynamic RAM with read-write/refresh mode judging capability Sep 11, 1991 Issued
Array ( [id] => 3129416 [patent_doc_number] => 05410700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Computer system which supports asynchronous commitment of data' [patent_app_type] => 1 [patent_app_number] => 7/754843 [patent_app_country] => US [patent_app_date] => 1991-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7608 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410700.pdf [firstpage_image] =>[orig_patent_app_number] => 754843 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/754843
Computer system which supports asynchronous commitment of data Sep 3, 1991 Issued
Array ( [id] => 2961899 [patent_doc_number] => 05222241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-22 [patent_title] => 'Digital signal processor having duplex working registers for switching to standby state during interrupt processing' [patent_app_type] => 1 [patent_app_number] => 7/750408 [patent_app_country] => US [patent_app_date] => 1991-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 59 [patent_no_of_words] => 26993 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/222/05222241.pdf [firstpage_image] =>[orig_patent_app_number] => 750408 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/750408
Digital signal processor having duplex working registers for switching to standby state during interrupt processing Aug 26, 1991 Issued
Array ( [id] => 2930894 [patent_doc_number] => 05206940 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-27 [patent_title] => 'Address control and generating system for digital signal-processor' [patent_app_type] => 1 [patent_app_number] => 7/750512 [patent_app_country] => US [patent_app_date] => 1991-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 68 [patent_no_of_words] => 26949 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/206/05206940.pdf [firstpage_image] =>[orig_patent_app_number] => 750512 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/750512
Address control and generating system for digital signal-processor Aug 26, 1991 Issued
Array ( [id] => 2925227 [patent_doc_number] => 05237667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-17 [patent_title] => 'Digital signal processor system having host processor for writing instructions into internal processor memory' [patent_app_type] => 1 [patent_app_number] => 7/755503 [patent_app_country] => US [patent_app_date] => 1991-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 68 [patent_no_of_words] => 27058 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/237/05237667.pdf [firstpage_image] =>[orig_patent_app_number] => 755503 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/755503
Digital signal processor system having host processor for writing instructions into internal processor memory Aug 26, 1991 Issued
Array ( [id] => 2947869 [patent_doc_number] => 05247627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Digital signal processor with conditional branch decision unit and storage of conditional branch decision results' [patent_app_type] => 1 [patent_app_number] => 7/750478 [patent_app_country] => US [patent_app_date] => 1991-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 59 [patent_no_of_words] => 26971 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247627.pdf [firstpage_image] =>[orig_patent_app_number] => 750478 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/750478
Digital signal processor with conditional branch decision unit and storage of conditional branch decision results Aug 26, 1991 Issued
Array ( [id] => 2934147 [patent_doc_number] => 05201048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-06 [patent_title] => 'High speed computer system for search and retrieval of data within text and record oriented files' [patent_app_type] => 1 [patent_app_number] => 7/750745 [patent_app_country] => US [patent_app_date] => 1991-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8358 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/201/05201048.pdf [firstpage_image] =>[orig_patent_app_number] => 750745 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/750745
High speed computer system for search and retrieval of data within text and record oriented files Aug 20, 1991 Issued
Array ( [id] => 2958431 [patent_doc_number] => 05255368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Method for selecting data communications paths for routing messages between processors in a parallel processing computer system organized as a hypercube' [patent_app_type] => 1 [patent_app_number] => 7/747037 [patent_app_country] => US [patent_app_date] => 1991-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5183 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255368.pdf [firstpage_image] =>[orig_patent_app_number] => 747037 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/747037
Method for selecting data communications paths for routing messages between processors in a parallel processing computer system organized as a hypercube Aug 18, 1991 Issued
07/746461 APPARATUS FOR HIGH-SPEED SOLUTION OF ARBITRARY MATHEMATICAL EXPRESSION WITH LOGIC CODE GENERATOR AND PROGRAMMABLE LOGIC CIRCUIT Aug 15, 1991 Abandoned
Array ( [id] => 3063500 [patent_doc_number] => 05305454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Notification of event handlers in broadcast or propagation mode by event management services in a computer system' [patent_app_type] => 1 [patent_app_number] => 7/744850 [patent_app_country] => US [patent_app_date] => 1991-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 23027 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/305/05305454.pdf [firstpage_image] =>[orig_patent_app_number] => 744850 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/744850
Notification of event handlers in broadcast or propagation mode by event management services in a computer system Aug 11, 1991 Issued
Array ( [id] => 2799069 [patent_doc_number] => 05155816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Pipelined apparatus and method for controlled loading of floating point data in a microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/742289 [patent_app_country] => US [patent_app_date] => 1991-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6063 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155816.pdf [firstpage_image] =>[orig_patent_app_number] => 742289 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/742289
Pipelined apparatus and method for controlled loading of floating point data in a microprocessor Aug 7, 1991 Issued
Array ( [id] => 3111031 [patent_doc_number] => 05293631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Analysis and optimization of array variables in compiler for instruction level parallel processor' [patent_app_type] => 1 [patent_app_number] => 7/741292 [patent_app_country] => US [patent_app_date] => 1991-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7248 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293631.pdf [firstpage_image] =>[orig_patent_app_number] => 741292 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/741292
Analysis and optimization of array variables in compiler for instruction level parallel processor Aug 5, 1991 Issued
07/739799 FILE EXTENSION BY CLIENTS IN A DISTRIBUTED DATA PROCESSING SYSTEM Jul 31, 1991 Abandoned
Array ( [id] => 2872660 [patent_doc_number] => 05150467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'Method and apparatus for suspending and restarting a bus cycle' [patent_app_type] => 1 [patent_app_number] => 7/740867 [patent_app_country] => US [patent_app_date] => 1991-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 9 [patent_no_of_words] => 13816 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/150/05150467.pdf [firstpage_image] =>[orig_patent_app_number] => 740867 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/740867
Method and apparatus for suspending and restarting a bus cycle Jul 30, 1991 Issued
Array ( [id] => 3035547 [patent_doc_number] => 05327560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-05 [patent_title] => 'Method of updating network reconfiguration information exchanged between a host computer and a communication control processor' [patent_app_type] => 1 [patent_app_number] => 7/735629 [patent_app_country] => US [patent_app_date] => 1991-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 40 [patent_no_of_words] => 11004 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/327/05327560.pdf [firstpage_image] =>[orig_patent_app_number] => 735629 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/735629
Method of updating network reconfiguration information exchanged between a host computer and a communication control processor Jul 24, 1991 Issued
Array ( [id] => 2806205 [patent_doc_number] => 05144551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-01 [patent_title] => 'Computer memory management method utilizing segmentation and protection techniques' [patent_app_type] => 1 [patent_app_number] => 7/714552 [patent_app_country] => US [patent_app_date] => 1991-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6342 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 634 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/144/05144551.pdf [firstpage_image] =>[orig_patent_app_number] => 714552 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/714552
Computer memory management method utilizing segmentation and protection techniques Jun 12, 1991 Issued
Array ( [id] => 2833228 [patent_doc_number] => 05095524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'On-line system which mainly executes regular jobs including apparatus for efficiently executing both regular jobs and irregular jobs' [patent_app_type] => 1 [patent_app_number] => 7/713599 [patent_app_country] => US [patent_app_date] => 1991-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6266 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/095/05095524.pdf [firstpage_image] =>[orig_patent_app_number] => 713599 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/713599
On-line system which mainly executes regular jobs including apparatus for efficiently executing both regular jobs and irregular jobs Jun 10, 1991 Issued
07/713043 DATA INPUT/OUTPUT CIRCUIT FOR A DIGITAL SIGNAL PROCESSING SYSTEM Jun 6, 1991 Abandoned
Array ( [id] => 2927709 [patent_doc_number] => 05179680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-12 [patent_title] => 'Instruction storage and cache miss recovery in a high speed multiprocessing parallel processing apparatus' [patent_app_type] => 1 [patent_app_number] => 7/707917 [patent_app_country] => US [patent_app_date] => 1991-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 17651 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/179/05179680.pdf [firstpage_image] =>[orig_patent_app_number] => 707917 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/707917
Instruction storage and cache miss recovery in a high speed multiprocessing parallel processing apparatus May 29, 1991 Issued
Array ( [id] => 3460847 [patent_doc_number] => 05386572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-31 [patent_title] => 'Information processing apparatus with discriminating communication and distinguishing display functions' [patent_app_type] => 1 [patent_app_number] => 7/702113 [patent_app_country] => US [patent_app_date] => 1991-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 1967 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/386/05386572.pdf [firstpage_image] =>[orig_patent_app_number] => 702113 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/702113
Information processing apparatus with discriminating communication and distinguishing display functions May 15, 1991 Issued
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