| Application number | Title of the application | Filing Date | Status |
|---|
| 07/243082 | DATA INPUT/OUTPUT CIRCUIT | Sep 8, 1988 | Abandoned |
Array
(
[id] => 2755045
[patent_doc_number] => 05003507
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-26
[patent_title] => 'EPROM emulator for selectively simulating a variety of different paging EPROMs in a test circuit'
[patent_app_type] => 1
[patent_app_number] => 7/241385
[patent_app_country] => US
[patent_app_date] => 1988-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2903
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/003/05003507.pdf
[firstpage_image] =>[orig_patent_app_number] => 241385
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/241385 | EPROM emulator for selectively simulating a variety of different paging EPROMs in a test circuit | Sep 5, 1988 | Issued |
Array
(
[id] => 2521095
[patent_doc_number] => 04841477
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-06-20
[patent_title] => 'Response/processing apparatus for external-abnormal-state in data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/240470
[patent_app_country] => US
[patent_app_date] => 1988-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2379
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/841/04841477.pdf
[firstpage_image] =>[orig_patent_app_number] => 240470
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/240470 | Response/processing apparatus for external-abnormal-state in data processing system | Sep 5, 1988 | Issued |
Array
(
[id] => 2596226
[patent_doc_number] => 04928225
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-22
[patent_title] => 'Coherent cache structures and methods'
[patent_app_type] => 1
[patent_app_number] => 7/240747
[patent_app_country] => US
[patent_app_date] => 1988-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 17291
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/928/04928225.pdf
[firstpage_image] =>[orig_patent_app_number] => 240747
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/240747 | Coherent cache structures and methods | Sep 1, 1988 | Issued |
| 07/238809 | NONVOLATILE MICROPROCESSOR WITH PREDETERMINED STATE ON POWER-DOWN | Aug 30, 1988 | Abandoned |
Array
(
[id] => 2602444
[patent_doc_number] => 04918648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-17
[patent_title] => 'Word processing device capable of editing many distinct documents using a single selection process'
[patent_app_type] => 1
[patent_app_number] => 7/239010
[patent_app_country] => US
[patent_app_date] => 1988-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1967
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/918/04918648.pdf
[firstpage_image] =>[orig_patent_app_number] => 239010
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/239010 | Word processing device capable of editing many distinct documents using a single selection process | Aug 28, 1988 | Issued |
Array
(
[id] => 2524381
[patent_doc_number] => 04852044
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-07-25
[patent_title] => 'Programmable data security circuit for programmable logic device'
[patent_app_type] => 1
[patent_app_number] => 7/236348
[patent_app_country] => US
[patent_app_date] => 1988-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4898
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/852/04852044.pdf
[firstpage_image] =>[orig_patent_app_number] => 236348
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/236348 | Programmable data security circuit for programmable logic device | Aug 21, 1988 | Issued |
Array
(
[id] => 2843952
[patent_doc_number] => 05129078
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-07
[patent_title] => 'Dedicated service processor with inter-channel communication features'
[patent_app_type] => 1
[patent_app_number] => 7/233786
[patent_app_country] => US
[patent_app_date] => 1988-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 11550
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/129/05129078.pdf
[firstpage_image] =>[orig_patent_app_number] => 233786
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/233786 | Dedicated service processor with inter-channel communication features | Aug 18, 1988 | Issued |
Array
(
[id] => 2494345
[patent_doc_number] => 04821171
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-04-11
[patent_title] => 'System of selective purging of address translation in computer memories'
[patent_app_type] => 1
[patent_app_number] => 7/233884
[patent_app_country] => US
[patent_app_date] => 1988-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2175
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 376
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/821/04821171.pdf
[firstpage_image] =>[orig_patent_app_number] => 233884
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/233884 | System of selective purging of address translation in computer memories | Aug 14, 1988 | Issued |
Array
(
[id] => 2758643
[patent_doc_number] => 05021943
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Content independent rule based options negotiations method'
[patent_app_type] => 1
[patent_app_number] => 7/226488
[patent_app_country] => US
[patent_app_date] => 1988-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4079
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/021/05021943.pdf
[firstpage_image] =>[orig_patent_app_number] => 226488
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/226488 | Content independent rule based options negotiations method | Jul 31, 1988 | Issued |
| 07/225721 | INFORMATION PROCESSING APPARATUS WITH COMMUNICATING FUNCTION | Jul 27, 1988 | Abandoned |
Array
(
[id] => 2702082
[patent_doc_number] => 05019967
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Pipeline bubble compression in a computer system'
[patent_app_type] => 1
[patent_app_number] => 7/221988
[patent_app_country] => US
[patent_app_date] => 1988-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 10898
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/019/05019967.pdf
[firstpage_image] =>[orig_patent_app_number] => 221988
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/221988 | Pipeline bubble compression in a computer system | Jul 19, 1988 | Issued |
Array
(
[id] => 2833186
[patent_doc_number] => 05095522
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Object-oriented parallel processing system, including concept objects and instance objects for messages exchanging between objects'
[patent_app_type] => 1
[patent_app_number] => 7/213115
[patent_app_country] => US
[patent_app_date] => 1988-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 3342
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/095/05095522.pdf
[firstpage_image] =>[orig_patent_app_number] => 213115
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/213115 | Object-oriented parallel processing system, including concept objects and instance objects for messages exchanging between objects | Jun 27, 1988 | Issued |
Array
(
[id] => 2566324
[patent_doc_number] => 04942551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-17
[patent_title] => 'Method and apparatus for storing MIDI information in subcode packs'
[patent_app_type] => 1
[patent_app_number] => 7/211355
[patent_app_country] => US
[patent_app_date] => 1988-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 4367
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/942/04942551.pdf
[firstpage_image] =>[orig_patent_app_number] => 211355
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/211355 | Method and apparatus for storing MIDI information in subcode packs | Jun 23, 1988 | Issued |
| 07/209505 | CONTROLLING THE INITIATION OF LOGICAL SYSTEMS IN A DATA PROCESSING SYSTEM WITH LOGICAL PROCESSOR FACILITY | Jun 20, 1988 | Abandoned |
Array
(
[id] => 2691056
[patent_doc_number] => 05045993
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Digital signal processor'
[patent_app_type] => 1
[patent_app_number] => 7/201208
[patent_app_country] => US
[patent_app_date] => 1988-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 59
[patent_no_of_words] => 27013
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 661
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/045/05045993.pdf
[firstpage_image] =>[orig_patent_app_number] => 201208
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/201208 | Digital signal processor | Jun 2, 1988 | Issued |
| 07/201414 | METHOD AND APPARATUS FOR PROCESSING INFORMATION DATA | Jun 1, 1988 | Abandoned |
Array
(
[id] => 2816746
[patent_doc_number] => 05146561
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-08
[patent_title] => 'Communication network data manager system'
[patent_app_type] => 1
[patent_app_number] => 7/203874
[patent_app_country] => US
[patent_app_date] => 1988-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 14793
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/146/05146561.pdf
[firstpage_image] =>[orig_patent_app_number] => 203874
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/203874 | Communication network data manager system | Jun 1, 1988 | Issued |
Array
(
[id] => 2679967
[patent_doc_number] => 05034917
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-23
[patent_title] => 'Computer system including a page mode memory with decreased access time and method of operation thereof'
[patent_app_type] => 1
[patent_app_number] => 7/196721
[patent_app_country] => US
[patent_app_date] => 1988-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9424
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/034/05034917.pdf
[firstpage_image] =>[orig_patent_app_number] => 196721
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/196721 | Computer system including a page mode memory with decreased access time and method of operation thereof | May 25, 1988 | Issued |
| 07/195696 | SRAM WITH FLASH CLEAR FOR SELECTABLE I/OS | May 17, 1988 | Abandoned |