Search

Kevin A. Kriess

Examiner (ID: 2597)

Most Active Art Unit
2316
Art Unit(s)
2755, 2307, 2787, 2316
Total Applications
665
Issued Applications
518
Pending Applications
18
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
06/620618 DATA TRANSMISSION METHOD IN A DIGITAL TRANSMISSION NETWORK AND APPARATUS FOR IMPLEMENTING SAME Jun 13, 1984 Abandoned
Array ( [id] => 2363879 [patent_doc_number] => 04658352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-14 [patent_title] => 'Computer system with a back-up power supply' [patent_app_type] => 1 [patent_app_number] => 6/616137 [patent_app_country] => US [patent_app_date] => 1984-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2679 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/658/04658352.pdf [firstpage_image] =>[orig_patent_app_number] => 616137 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/616137
Computer system with a back-up power supply May 31, 1984 Issued
Array ( [id] => 2397737 [patent_doc_number] => 04663729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-05 [patent_title] => 'Display architecture having variable data width' [patent_app_type] => 1 [patent_app_number] => 6/616047 [patent_app_country] => US [patent_app_date] => 1984-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 6217 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/663/04663729.pdf [firstpage_image] =>[orig_patent_app_number] => 616047 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/616047
Display architecture having variable data width May 31, 1984 Issued
06/590817 MEMORY MANAGEMENT METHOD AND APPARATUS FOR INITIALIZING AND/OR CLEARING R/W STORAGE AREAS Mar 15, 1984 Abandoned
Array ( [id] => 2294790 [patent_doc_number] => 04679169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-07 [patent_title] => 'Printer hammer resetting control system' [patent_app_type] => 1 [patent_app_number] => 6/587755 [patent_app_country] => US [patent_app_date] => 1984-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5591 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 476 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/679/04679169.pdf [firstpage_image] =>[orig_patent_app_number] => 587755 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/587755
Printer hammer resetting control system Mar 8, 1984 Issued
Array ( [id] => 2427253 [patent_doc_number] => 04727478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-23 [patent_title] => 'Computer apparatus and remote keyboards therefor' [patent_app_type] => 1 [patent_app_number] => 6/580630 [patent_app_country] => US [patent_app_date] => 1984-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4492 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/727/04727478.pdf [firstpage_image] =>[orig_patent_app_number] => 580630 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/580630
Computer apparatus and remote keyboards therefor Feb 15, 1984 Issued
Array ( [id] => 2355046 [patent_doc_number] => 04692858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-08 [patent_title] => 'Visual interface between user and computer system' [patent_app_type] => 1 [patent_app_number] => 6/576535 [patent_app_country] => US [patent_app_date] => 1984-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 18109 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/692/04692858.pdf [firstpage_image] =>[orig_patent_app_number] => 576535 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/576535
Visual interface between user and computer system Feb 1, 1984 Issued
Array ( [id] => 2317293 [patent_doc_number] => 04675843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-23 [patent_title] => 'Programmable logic controller' [patent_app_type] => 1 [patent_app_number] => 6/566102 [patent_app_country] => US [patent_app_date] => 1983-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4591 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/675/04675843.pdf [firstpage_image] =>[orig_patent_app_number] => 566102 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/566102
Programmable logic controller Dec 26, 1983 Issued
Array ( [id] => 2355541 [patent_doc_number] => 04692895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-08 [patent_title] => 'Microprocessor peripheral access control circuit' [patent_app_type] => 1 [patent_app_number] => 6/564931 [patent_app_country] => US [patent_app_date] => 1983-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1596 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/692/04692895.pdf [firstpage_image] =>[orig_patent_app_number] => 564931 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/564931
Microprocessor peripheral access control circuit Dec 22, 1983 Issued
Array ( [id] => 2309810 [patent_doc_number] => 04642810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-10 [patent_title] => 'Repetitive sequence data transmission system' [patent_app_type] => 1 [patent_app_number] => 6/561848 [patent_app_country] => US [patent_app_date] => 1983-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4993 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/642/04642810.pdf [firstpage_image] =>[orig_patent_app_number] => 561848 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/561848
Repetitive sequence data transmission system Dec 14, 1983 Issued
Array ( [id] => 2297830 [patent_doc_number] => 04639891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-27 [patent_title] => 'Signals path control circuitry for a data terminal' [patent_app_type] => 1 [patent_app_number] => 6/551010 [patent_app_country] => US [patent_app_date] => 1983-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2535 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/639/04639891.pdf [firstpage_image] =>[orig_patent_app_number] => 551010 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/551010
Signals path control circuitry for a data terminal Nov 13, 1983 Issued
06/549955 WAIT MODE POWER REDUCTION SYSTEM AND METHOD FOR A DATA PROCESSOR Nov 6, 1983 Abandoned
Array ( [id] => 2358662 [patent_doc_number] => 04714990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-22 [patent_title] => 'Data storage apparatus' [patent_app_type] => 1 [patent_app_number] => 6/525152 [patent_app_country] => US [patent_app_date] => 1983-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2618 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/714/04714990.pdf [firstpage_image] =>[orig_patent_app_number] => 525152 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/525152
Data storage apparatus Aug 21, 1983 Issued
06/524632 INTERFACE DEVICE Aug 18, 1983 Abandoned
Array ( [id] => 2290405 [patent_doc_number] => 04604687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Method and system for storing and retrieving multiple channel sampled data' [patent_app_type] => 1 [patent_app_number] => 6/522024 [patent_app_country] => US [patent_app_date] => 1983-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604687.pdf [firstpage_image] =>[orig_patent_app_number] => 522024 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/522024
Method and system for storing and retrieving multiple channel sampled data Aug 10, 1983 Issued
06/504706 INFORMATION HANDLING APPARATUS HAVING MEMORY MEANS Jun 14, 1983 Abandoned
06/485080 SOFT PROGRAMMABLE LOGIC ARRAY Apr 13, 1983 Abandoned
Array ( [id] => 2302135 [patent_doc_number] => 04697266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-29 [patent_title] => 'Asynchronous checkpointing system for error recovery' [patent_app_type] => 1 [patent_app_number] => 6/475154 [patent_app_country] => US [patent_app_date] => 1983-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 6750 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/697/04697266.pdf [firstpage_image] =>[orig_patent_app_number] => 475154 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/475154
Asynchronous checkpointing system for error recovery Mar 13, 1983 Issued
06/474831 COMPUTER MEMORY SYSTEM Mar 13, 1983 Abandoned
Array ( [id] => 2434083 [patent_doc_number] => 04739474 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-19 [patent_title] => 'Geometric-arithmetic parallel processor' [patent_app_type] => 1 [patent_app_number] => 6/474209 [patent_app_country] => US [patent_app_date] => 1983-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8993 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/739/04739474.pdf [firstpage_image] =>[orig_patent_app_number] => 474209 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/474209
Geometric-arithmetic parallel processor Mar 9, 1983 Issued
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