Kevin A. Parendo

Array ( [id] => 9836400 [patent_doc_number] => 20150028482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'DEVICE LAYOUT FOR REDUCING THROUGH-SILICON-VIA STRESS' [patent_app_type] => utility [patent_app_number] => 13/948442 [patent_app_country] => US [patent_app_date] => 2013-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9135002 [patent_doc_number] => 20130295717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry' [patent_app_type] => utility [patent_app_number] => 13/936957 [patent_app_country] => US [patent_app_date] => 2013-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3382 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13936957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9202399 [patent_doc_number] => 20140001576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'LOWERING TUNGSTEN RESISTIVITY BY REPLACING TITANIUM NITRIDE WITH TITANIUM SILICON NITRIDE' [patent_app_type] => utility [patent_app_number] => 13/922063 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10311 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11207784 [patent_doc_number] => 09437415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Layer alignment in FinFET fabrication' [patent_app_type] => utility [patent_app_number] => 13/912936 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 4591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9178472 [patent_doc_number] => 20130320457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING SOURCE/DRAIN STRESSORS AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/909404 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10016264 [patent_doc_number] => 09059287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Semiconductor device including finfet and diode having reduced defects in depletion region' [patent_app_type] => utility [patent_app_number] => 13/909673 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3019 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10047498 [patent_doc_number] => 09087904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Thin-film transistor having tapered organic etch-stopper layer' [patent_app_type] => utility [patent_app_number] => 14/236698 [patent_app_country] => US [patent_app_date] => 2013-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 12422 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14236698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9667947 [patent_doc_number] => 20140231810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/903171 [patent_app_country] => US [patent_app_date] => 2013-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8338 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13903171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9335031 [patent_doc_number] => 20140061813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/902099 [patent_app_country] => US [patent_app_date] => 2013-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13902099 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10943586 [patent_doc_number] => 20140346607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'Tuning Tensile Strain on FinFET' [patent_app_type] => utility [patent_app_number] => 13/901399 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13901399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10936622 [patent_doc_number] => 20140339643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'FINFET STRUCTURES HAVING SILICON GERMANIUM AND SILICON FINS' [patent_app_type] => utility [patent_app_number] => 13/896930 [patent_app_country] => US [patent_app_date] => 2013-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9418795 [patent_doc_number] => 20140103445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'SEMICONDUCTOR SRAM STRUCTURES AND FABRICATION METHODS' [patent_app_type] => utility [patent_app_number] => 13/890278 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9832342 [patent_doc_number] => 08941161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Semiconductor device including finFET and diode having reduced defects in depletion region' [patent_app_type] => utility [patent_app_number] => 13/888680 [patent_app_country] => US [patent_app_date] => 2013-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2982 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9995777 [patent_doc_number] => 09040372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Niobium and vanadium organometallic precursors for thin film deposition' [patent_app_type] => utility [patent_app_number] => 13/888970 [patent_app_country] => US [patent_app_date] => 2013-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5111 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9031497 [patent_doc_number] => 20130234135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/871305 [patent_app_country] => US [patent_app_date] => 2013-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13015 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13871305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9013851 [patent_doc_number] => 20130228815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'VERTICAL SOLID-STATE TRANSDUCERS HAVING BACKSIDE TERMINALS AND ASSOCIATED SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/863625 [patent_app_country] => US [patent_app_date] => 2013-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6261 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13863625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9158805 [patent_doc_number] => 20130307082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'SEMICONDUCTOR DEVICES WITH SELF-ALIGNED SOURCE DRAIN CONTACTS AND METHODS FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/860813 [patent_app_country] => US [patent_app_date] => 2013-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2985 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10073421 [patent_doc_number] => 09111783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Semiconductor devices with self-aligned source drain contacts and methods for making the same' [patent_app_type] => utility [patent_app_number] => 13/860103 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3382 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860103 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9132066 [patent_doc_number] => 20130292779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PRODUCTION PROCESS' [patent_app_type] => utility [patent_app_number] => 13/853807 [patent_app_country] => US [patent_app_date] => 2013-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3828 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13853807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8916398 [patent_doc_number] => 20130178023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'ETCHING SOLUTION COMPOSITION AND METHOD OF ETCHING USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/783083 [patent_app_country] => US [patent_app_date] => 2013-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6624 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783083 [rel_patent_id] =>[rel_patent_doc_number] =>)