Search

Kevin A. Parendo

Examiner (ID: 2896, Phone: (571)270-5030 , Office: P/2819 )

Most Active Art Unit
2823
Art Unit(s)
2823, 4122, 2896, 2819
Total Applications
837
Issued Applications
560
Pending Applications
85
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8821649 [patent_doc_number] => 20130122694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'Semiconductor substrate, semiconductor device, and manufacturing methods thereof' [patent_app_type] => utility [patent_app_number] => 13/694749 [patent_app_country] => US [patent_app_date] => 2012-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 17870 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13694749 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/694749
Method of manufacturing a compound semiconductor substrate in a flattened growth substrate Dec 30, 2012 Issued
Array ( [id] => 9937275 [patent_doc_number] => 08987079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Method for developing a custom device' [patent_app_type] => utility [patent_app_number] => 13/683344 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 522 [patent_figures_cnt] => 667 [patent_no_of_words] => 118475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683344 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/683344
Method for developing a custom device Nov 20, 2012 Issued
Array ( [id] => 8669024 [patent_doc_number] => 20130043562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'Compressive Polycrystalline Silicon Film and Method of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 13/660966 [patent_app_country] => US [patent_app_date] => 2012-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13660966 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/660966
Compressive polycrystalline silicon film and method of manufacture thereof Oct 24, 2012 Issued
Array ( [id] => 11791805 [patent_doc_number] => 09401452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'P-side layers for short wavelength light emitters' [patent_app_type] => utility [patent_app_number] => 13/619598 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 10058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619598 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619598
P-side layers for short wavelength light emitters Sep 13, 2012 Issued
Array ( [id] => 10016187 [patent_doc_number] => 09059207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Strained channel for depleted channel semiconductor devices' [patent_app_type] => utility [patent_app_number] => 13/613747 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 10567 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613747 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/613747
Strained channel for depleted channel semiconductor devices Sep 12, 2012 Issued
Array ( [id] => 8506607 [patent_doc_number] => 20120306015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'CONTACTS FOR FET DEVICES' [patent_app_type] => utility [patent_app_number] => 13/562355 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3645 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562355 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562355
CONTACTS FOR FET DEVICES Jul 30, 2012 Abandoned
13/551407 SIMULTANEOUS FORMATION OF A TOP OXIDE LAYER IN A SILICON-OXIDE-NITRIDE-OXIDE-SILICON (SONOS) TRANSISTOR AND A GATE OXIDE IN A METAL OXIDE SEMICONDUCTOR (MOS) Jul 16, 2012 Abandoned
Array ( [id] => 8582847 [patent_doc_number] => 20130001668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'FLOATING GATE DEVICE WITH OXYGEN SCAVENGING ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/550102 [patent_app_country] => US [patent_app_date] => 2012-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7580 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550102 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/550102
Floating gate device with oxygen scavenging element Jul 15, 2012 Issued
Array ( [id] => 8474481 [patent_doc_number] => 20120273889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER' [patent_app_type] => utility [patent_app_number] => 13/548304 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5339 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548304 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/548304
Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner Jul 12, 2012 Issued
Array ( [id] => 11264482 [patent_doc_number] => 09488776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Method for fabricating silicon photonic waveguides' [patent_app_type] => utility [patent_app_number] => 13/543999 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1430 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543999
Method for fabricating silicon photonic waveguides Jul 8, 2012 Issued
Array ( [id] => 8586311 [patent_doc_number] => 20130005132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'Floating gate device with oxygen scavenging element' [patent_app_type] => utility [patent_app_number] => 13/534527 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7561 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13534527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/534527
Floating gate device with oxygen scavenging element Jun 26, 2012 Issued
Array ( [id] => 9594654 [patent_doc_number] => 20140191331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'Transistor and Its Method of Manufacture' [patent_app_type] => utility [patent_app_number] => 14/129630 [patent_app_country] => US [patent_app_date] => 2012-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 13666 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14129630 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/129630
Methods of manufacturing transistors including forming a depression in a surface of a covering of resist material Jun 21, 2012 Issued
Array ( [id] => 8441943 [patent_doc_number] => 20120258559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'Semiconductor substrate, semiconductor device, and manufacturing methods thereof' [patent_app_type] => utility [patent_app_number] => 13/507210 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 17807 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13507210 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/507210
Method of preparing semiconductor layer including cavities Jun 12, 2012 Issued
Array ( [id] => 9183791 [patent_doc_number] => 08623723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Method for manufacturing a semiconductor device with a bit line contact hole' [patent_app_type] => utility [patent_app_number] => 13/494923 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3465 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494923 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494923
Method for manufacturing a semiconductor device with a bit line contact hole Jun 11, 2012 Issued
Array ( [id] => 10099838 [patent_doc_number] => 09136153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => '3D semiconductor device and structure with back-bias' [patent_app_type] => utility [patent_app_number] => 13/492395 [patent_app_country] => US [patent_app_date] => 2012-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 717 [patent_figures_cnt] => 884 [patent_no_of_words] => 191431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13492395 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/492395
3D semiconductor device and structure with back-bias Jun 7, 2012 Issued
Array ( [id] => 8390811 [patent_doc_number] => 20120228651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'LIGHT-EMITTING-DIODE ARRAY' [patent_app_type] => utility [patent_app_number] => 13/481299 [patent_app_country] => US [patent_app_date] => 2012-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5800 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13481299 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/481299
LIGHT-EMITTING-DIODE ARRAY May 24, 2012 Abandoned
Array ( [id] => 8393739 [patent_doc_number] => 20120231579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry' [patent_app_type] => utility [patent_app_number] => 13/478460 [patent_app_country] => US [patent_app_date] => 2012-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3325 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13478460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/478460
Methods of depositing antimony-comprising phase change material onto a substrate and methods of forming phase change memory circuitry May 22, 2012 Issued
Array ( [id] => 8493211 [patent_doc_number] => 20120292619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'BACKSIDE TEXTURING BY CUSPS TO IMPROVE IR RESPONSE OF SILICON SOLAR CELLS AND PHOTODETECTORS' [patent_app_type] => utility [patent_app_number] => 13/506916 [patent_app_country] => US [patent_app_date] => 2012-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7662 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13506916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/506916
BACKSIDE TEXTURING BY CUSPS TO IMPROVE IR RESPONSE OF SILICON SOLAR CELLS AND PHOTODETECTORS May 22, 2012 Abandoned
Array ( [id] => 8483305 [patent_doc_number] => 20120282712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'DOPANT MARKER FOR PRECISE RECESS CONTROL' [patent_app_type] => utility [patent_app_number] => 13/471756 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13471756 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/471756
DOPANT MARKER FOR PRECISE RECESS CONTROL May 14, 2012 Abandoned
Array ( [id] => 8381871 [patent_doc_number] => 20120225503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'DOPANT MARKER FOR PRECISE RECESS CONTROL' [patent_app_type] => utility [patent_app_number] => 13/471684 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13471684 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/471684
Dopant marker for precise recess control May 14, 2012 Issued
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