Search

Kevin C. Sirmons

Supervisory Patent Examiner (ID: 9390, Phone: (571)272-4965 , Office: P/3763 )

Most Active Art Unit
3783
Art Unit(s)
3783, 3763, 3767, 3734
Total Applications
591
Issued Applications
290
Pending Applications
110
Abandoned Applications
194

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16896399 [patent_doc_number] => 11037961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Array substrate and display panel [patent_app_type] => utility [patent_app_number] => 16/464615 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3286 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16464615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/464615
Array substrate and display panel Apr 18, 2019 Issued
Array ( [id] => 14691559 [patent_doc_number] => 20190244895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => SERIES MIM STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/386891 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386891 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/386891
Series MIM structures Apr 16, 2019 Issued
Array ( [id] => 16586134 [patent_doc_number] => 20210020536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => METHOD OF MANUFACTURING INSULATING CIRCUIT BOARD WITH HEATSINK [patent_app_type] => utility [patent_app_number] => 16/980054 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16980054 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/980054
Method of manufacturing insulating circuit board with heatsink Mar 25, 2019 Issued
Array ( [id] => 16586128 [patent_doc_number] => 20210020530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => INSULATION CIRCUIT BOARD WITH HEAT SINK [patent_app_type] => utility [patent_app_number] => 17/040236 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17040236 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/040236
Insulation circuit board with heat sink Mar 24, 2019 Issued
Array ( [id] => 16293575 [patent_doc_number] => 10770430 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Package integration for memory devices [patent_app_type] => utility [patent_app_number] => 16/361617 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4859 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361617 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361617
Package integration for memory devices Mar 21, 2019 Issued
Array ( [id] => 16495921 [patent_doc_number] => 10861974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Semiconductor structure and process thereof [patent_app_type] => utility [patent_app_number] => 16/361231 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3231 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361231 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361231
Semiconductor structure and process thereof Mar 21, 2019 Issued
Array ( [id] => 16645722 [patent_doc_number] => 10923590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Wrap-around contact for vertical field effect transistors [patent_app_type] => utility [patent_app_number] => 16/361563 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7807 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361563 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361563
Wrap-around contact for vertical field effect transistors Mar 21, 2019 Issued
Array ( [id] => 16324296 [patent_doc_number] => 10784268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-22 [patent_title] => OTP elements with high aspect ratio MTJ [patent_app_type] => utility [patent_app_number] => 16/360556 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/360556
OTP elements with high aspect ratio MTJ Mar 20, 2019 Issued
Array ( [id] => 15109235 [patent_doc_number] => 10475950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Light-emitting device [patent_app_type] => utility [patent_app_number] => 16/358352 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358352
Light-emitting device Mar 18, 2019 Issued
Array ( [id] => 17232485 [patent_doc_number] => 20210359042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => DISPLAY PANEL, FABRICATION METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/482466 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16482466 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/482466
Display panel, fabrication method thereof, and display device Feb 14, 2019 Issued
Array ( [id] => 15260439 [patent_doc_number] => 20190378953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => LIGHT EMITTING ELEMENT, METHOD OF MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/274109 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274109
Light emitting element, method of manufacturing the same, and display device including the same Feb 11, 2019 Issued
Array ( [id] => 16819965 [patent_doc_number] => 11004803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Dummy dies for reducing warpage in packages [patent_app_type] => utility [patent_app_number] => 16/273887 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 6593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16273887 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/273887
Dummy dies for reducing warpage in packages Feb 11, 2019 Issued
Array ( [id] => 16241770 [patent_doc_number] => 20200259004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => HETEROJUNCTION BIPOLAR TRANSISTORS WITH FIELD PLATES [patent_app_type] => utility [patent_app_number] => 16/274094 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274094 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274094
Heterojunction bipolar transistors with field plates Feb 11, 2019 Issued
Array ( [id] => 14752911 [patent_doc_number] => 20190259629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/273991 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16273991 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/273991
Method of manufacturing semiconductor devices and corresponding semiconductor device Feb 11, 2019 Issued
Array ( [id] => 16239681 [patent_doc_number] => 20200256915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => INLINE MONITORING TEST STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/274158 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274158 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274158
INLINE MONITORING TEST STRUCTURE Feb 11, 2019 Abandoned
Array ( [id] => 15274529 [patent_doc_number] => 20190385999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => POWER GRID AND STANDARD CELL CO-DESIGN STRUCTURE AND METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 16/274229 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274229 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274229
Power grid and standard cell co-design structure and methods thereof Feb 11, 2019 Issued
Array ( [id] => 16249510 [patent_doc_number] => 10748885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/273859 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7127 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16273859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/273859
Semiconductor device and method for manufacturing semiconductor device Feb 11, 2019 Issued
Array ( [id] => 16241645 [patent_doc_number] => 20200258879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => ELECTROSTATIC DISCHARGE (ESD) ROBUST TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/274129 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274129 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274129
Electrostatic discharge (ESD) robust transistor Feb 11, 2019 Issued
Array ( [id] => 15984723 [patent_doc_number] => 10672699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Semiconductor device with redistribution layers on partial encapsulation and non-photosensitive passivation layers [patent_app_type] => utility [patent_app_number] => 16/261102 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8226 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261102 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/261102
Semiconductor device with redistribution layers on partial encapsulation and non-photosensitive passivation layers Jan 28, 2019 Issued
Array ( [id] => 14414267 [patent_doc_number] => 20190172977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/259459 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16259459 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/259459
Light-emitting device and manufacturing method thereof Jan 27, 2019 Issued
Menu