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Kevin D Ahlstrom

Examiner (ID: 1368)

Most Active Art Unit
2835
Art Unit(s)
2835
Total Applications
2
Issued Applications
2
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14961635 [patent_doc_number] => 20190308295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => POLISHING HEAD, CHEMICAL-MECHANICAL POLISHING SYSTEM AND METHOD FOR POLISHING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/449855 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449855 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449855
Polishing head, chemical-mechanical polishing system and method for polishing substrate Jun 23, 2019 Issued
Array ( [id] => 14969431 [patent_doc_number] => 20190312194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => DRY PLASMA ETCH METHOD TO PATTERN MRAM STACK [patent_app_type] => utility [patent_app_number] => 16/449141 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449141
Dry plasma etch method to pattern MRAM stack Jun 20, 2019 Issued
Array ( [id] => 17470080 [patent_doc_number] => 11276563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Plasma etching method using faraday box [patent_app_type] => utility [patent_app_number] => 16/982191 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6946 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16982191 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/982191
Plasma etching method using faraday box Jun 17, 2019 Issued
Array ( [id] => 15666145 [patent_doc_number] => 10597290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Process for filling etched holes using first and second polymers [patent_app_type] => utility [patent_app_number] => 16/409687 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 6057 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16409687 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/409687
Process for filling etched holes using first and second polymers May 9, 2019 Issued
Array ( [id] => 16552972 [patent_doc_number] => 10886137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Selective nitride removal [patent_app_type] => utility [patent_app_number] => 16/399391 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7782 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399391 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399391
Selective nitride removal Apr 29, 2019 Issued
Array ( [id] => 17063061 [patent_doc_number] => 11107671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Method of processing semiconductor substrate [patent_app_type] => utility [patent_app_number] => 16/391098 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391098
Method of processing semiconductor substrate Apr 21, 2019 Issued
Array ( [id] => 15580551 [patent_doc_number] => 10580668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Substrate processing apparatus and substrate processing method using substrate processing apparatus [patent_app_type] => utility [patent_app_number] => 16/373228 [patent_app_country] => US [patent_app_date] => 2019-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 22434 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16373228 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/373228
Substrate processing apparatus and substrate processing method using substrate processing apparatus Apr 1, 2019 Issued
Array ( [id] => 16668406 [patent_doc_number] => 10937661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Method for removing silicon oxide and integrated circuit manufacturing process [patent_app_type] => utility [patent_app_number] => 16/372849 [patent_app_country] => US [patent_app_date] => 2019-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 6477 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372849
Method for removing silicon oxide and integrated circuit manufacturing process Apr 1, 2019 Issued
Array ( [id] => 16586039 [patent_doc_number] => 20210020441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => IN SITU INVERSE MASK PATTERNING [patent_app_type] => utility [patent_app_number] => 17/040922 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17040922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/040922
IN SITU INVERSE MASK PATTERNING Mar 28, 2019 Abandoned
Array ( [id] => 14588091 [patent_doc_number] => 20190221654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => ULTRAHIGH SELECTIVE POLYSILICON ETCH WITH HIGH THROUGHPUT [patent_app_type] => utility [patent_app_number] => 16/364797 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364797 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364797
ULTRAHIGH SELECTIVE POLYSILICON ETCH WITH HIGH THROUGHPUT Mar 25, 2019 Abandoned
Array ( [id] => 16916206 [patent_doc_number] => 20210189298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => IMIDAZOLIDINETHIONE-CONTAINING COMPOSITIONS FOR POST-ASH RESIDUE REMOVAL AND/OR FOR OXIDATIVE ETCHING OF A LAYER OR MASK COMPRISING TiN [patent_app_type] => utility [patent_app_number] => 17/044989 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17044989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/044989
IMIDAZOLIDINETHIONE-CONTAINING COMPOSITIONS FOR POST-ASH RESIDUE REMOVAL AND/OR FOR OXIDATIVE ETCHING OF A LAYER OR MASK COMPRISING TiN Mar 24, 2019 Pending
Array ( [id] => 15697345 [patent_doc_number] => 10604842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 16/359884 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 11731 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359884 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359884
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Mar 19, 2019 Issued
Array ( [id] => 17513167 [patent_doc_number] => 11292289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Method of manufacturing a floor board [patent_app_type] => utility [patent_app_number] => 16/356750 [patent_app_country] => US [patent_app_date] => 2019-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2670 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16356750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/356750
Method of manufacturing a floor board Mar 17, 2019 Issued
Array ( [id] => 14868389 [patent_doc_number] => 20190284436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => COMPOSITION AND METHOD FOR TREATING SEMICONDUCTOR SURFACE [patent_app_type] => utility [patent_app_number] => 16/353130 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353130
COMPOSITION AND METHOD FOR TREATING SEMICONDUCTOR SURFACE Mar 13, 2019 Abandoned
Array ( [id] => 15213603 [patent_doc_number] => 20190369488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => ALIGNMENT MARK, IMPRINTING METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/351057 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16351057 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/351057
Alignment mark, imprinting method, and manufacturing method of semiconductor device Mar 11, 2019 Issued
Array ( [id] => 14868925 [patent_doc_number] => 20190284704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => Etching Solution for Tungsten Word Line Recess [patent_app_type] => utility [patent_app_number] => 16/297957 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297957
Etching solution for tungsten word line recess Mar 10, 2019 Issued
Array ( [id] => 15822951 [patent_doc_number] => 10636671 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-28 [patent_title] => Planarization process [patent_app_type] => utility [patent_app_number] => 16/296243 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296243 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296243
Planarization process Mar 7, 2019 Issued
Array ( [id] => 15597561 [patent_doc_number] => 20200075315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SUBSTRATE TREATING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/296816 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296816
Substrate treating method and semiconductor device manufacturing method Mar 7, 2019 Issued
Array ( [id] => 14722267 [patent_doc_number] => 20190252197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => METHOD OF QUASI-ATOMIC LAYER ETCHING OF SILICON NITRIDE [patent_app_type] => utility [patent_app_number] => 16/288334 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288334
Method of quasi-atomic layer etching of silicon nitride Feb 27, 2019 Issued
Array ( [id] => 16731085 [patent_doc_number] => 20210098233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => CAPACITANCE MEASUREMENT WITHOUT DISCONNECTING FROM HIGH POWER CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/733537 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15733537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/733537
Capacitance measurement without disconnecting from high power circuit Feb 21, 2019 Issued
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