
Kevin L. Lee
Examiner (ID: 14152, Phone: (571)272-4915 , Office: P/3753 )
| Most Active Art Unit | 3753 |
| Art Unit(s) | 3753, 3407, 3727, 2899 |
| Total Applications | 3737 |
| Issued Applications | 3236 |
| Pending Applications | 189 |
| Abandoned Applications | 321 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3623020
[patent_doc_number] => 05607872
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'Method of fabricating charge coupled device'
[patent_app_type] => 1
[patent_app_number] => 8/477299
[patent_app_country] => US
[patent_app_date] => 1995-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 21
[patent_no_of_words] => 4125
[patent_no_of_claims] => 26
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[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/607/05607872.pdf
[firstpage_image] =>[orig_patent_app_number] => 477299
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/477299 | Method of fabricating charge coupled device | Jun 5, 1995 | Issued |
Array
(
[id] => 3620219
[patent_doc_number] => 05688725
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance'
[patent_app_type] => 1
[patent_app_number] => 8/482357
[patent_app_country] => US
[patent_app_date] => 1995-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
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[patent_no_of_words] => 4800
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/688/05688725.pdf
[firstpage_image] =>[orig_patent_app_number] => 482357
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/482357 | Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance | Jun 5, 1995 | Issued |
Array
(
[id] => 3771769
[patent_doc_number] => 05807780
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'High frequency analog transistors method of fabrication and circuit implementation'
[patent_app_type] => 1
[patent_app_number] => 8/462851
[patent_app_country] => US
[patent_app_date] => 1995-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/807/05807780.pdf
[firstpage_image] =>[orig_patent_app_number] => 462851
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/462851 | High frequency analog transistors method of fabrication and circuit implementation | Jun 4, 1995 | Issued |
Array
(
[id] => 3815678
[patent_doc_number] => 05770519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/464305
[patent_app_country] => US
[patent_app_date] => 1995-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3535
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[firstpage_image] =>[orig_patent_app_number] => 464305
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/464305 | Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device | Jun 4, 1995 | Issued |
Array
(
[id] => 3611496
[patent_doc_number] => 05565374
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'Method for fabricating a solid-state image sensing'
[patent_app_type] => 1
[patent_app_number] => 8/464095
[patent_app_country] => US
[patent_app_date] => 1995-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/565/05565374.pdf
[firstpage_image] =>[orig_patent_app_number] => 464095
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/464095 | Method for fabricating a solid-state image sensing | Jun 4, 1995 | Issued |
Array
(
[id] => 3585962
[patent_doc_number] => 05552332
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-03
[patent_title] => 'Process for fabricating a MOSFET device having reduced reverse short channel effects'
[patent_app_type] => 1
[patent_app_number] => 8/460339
[patent_app_country] => US
[patent_app_date] => 1995-06-02
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[pdf_file] => patents/05/552/05552332.pdf
[firstpage_image] =>[orig_patent_app_number] => 460339
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/460339 | Process for fabricating a MOSFET device having reduced reverse short channel effects | Jun 1, 1995 | Issued |
Array
(
[id] => 3615660
[patent_doc_number] => 05593541
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Method of manufacturing using corrosion-resistant apparatus comprising rhodium'
[patent_app_type] => 1
[patent_app_number] => 8/459905
[patent_app_country] => US
[patent_app_date] => 1995-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/593/05593541.pdf
[firstpage_image] =>[orig_patent_app_number] => 459905
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/459905 | Method of manufacturing using corrosion-resistant apparatus comprising rhodium | Jun 1, 1995 | Issued |
Array
(
[id] => 4040858
[patent_doc_number] => 05908508
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-01
[patent_title] => 'Gas diffuser plate assembly and RF electrode'
[patent_app_type] => 1
[patent_app_number] => 8/453382
[patent_app_country] => US
[patent_app_date] => 1995-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 3447
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[pdf_file] => patents/05/908/05908508.pdf
[firstpage_image] =>[orig_patent_app_number] => 453382
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/453382 | Gas diffuser plate assembly and RF electrode | May 29, 1995 | Issued |
Array
(
[id] => 3621344
[patent_doc_number] => 05593913
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Method of manufacturing solid state imaging device having high sensitivity and exhibiting high degree of light utilization'
[patent_app_type] => 1
[patent_app_number] => 8/449835
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[patent_app_date] => 1995-05-24
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[pdf_file] => patents/05/593/05593913.pdf
[firstpage_image] =>[orig_patent_app_number] => 449835
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449835 | Method of manufacturing solid state imaging device having high sensitivity and exhibiting high degree of light utilization | May 23, 1995 | Issued |
Array
(
[id] => 3660224
[patent_doc_number] => 05648289
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-15
[patent_title] => 'Method for coding semiconductor read only memory device'
[patent_app_type] => 1
[patent_app_number] => 8/447609
[patent_app_country] => US
[patent_app_date] => 1995-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 447609
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/447609 | Method for coding semiconductor read only memory device | May 22, 1995 | Issued |
Array
(
[id] => 3506099
[patent_doc_number] => 05569616
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-29
[patent_title] => 'Process for forming an output circuit device for a charge transfer element having tripartite diffusion layer'
[patent_app_type] => 1
[patent_app_number] => 8/446251
[patent_app_country] => US
[patent_app_date] => 1995-05-22
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[pdf_file] => patents/05/569/05569616.pdf
[firstpage_image] =>[orig_patent_app_number] => 446251
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/446251 | Process for forming an output circuit device for a charge transfer element having tripartite diffusion layer | May 21, 1995 | Issued |
Array
(
[id] => 3549422
[patent_doc_number] => 05571730
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Semiconductor device having vertical metal oxide semiconductors and a method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/445649
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[patent_app_date] => 1995-05-22
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[pdf_file] => patents/05/571/05571730.pdf
[firstpage_image] =>[orig_patent_app_number] => 445649
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/445649 | Semiconductor device having vertical metal oxide semiconductors and a method for manufacturing the same | May 21, 1995 | Issued |
Array
(
[id] => 3625197
[patent_doc_number] => 05620933
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Micromachined relay and method of forming the relay'
[patent_app_type] => 1
[patent_app_number] => 8/445139
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[patent_app_date] => 1995-05-19
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[firstpage_image] =>[orig_patent_app_number] => 445139
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/445139 | Micromachined relay and method of forming the relay | May 18, 1995 | Issued |
Array
(
[id] => 3696765
[patent_doc_number] => 05677200
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Color charge-coupled device and method of manufacturing the same'
[patent_app_type] => 1
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[patent_app_date] => 1995-05-17
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[pdf_file] => patents/05/677/05677200.pdf
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Array
(
[id] => 3828224
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[patent_kind] => NA
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[patent_title] => 'Method of manufacturing a semiconductor device using gate side wall as mask for self-alignment'
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Array
(
[id] => 3523862
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[patent_issue_date] => 1996-06-18
[patent_title] => 'Method of fabrication of a semiconductor device having high-and low-voltage MOS transistors'
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Array
(
[id] => 3587199
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Array
(
[id] => 3660265
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/432715 | Method for preventing microroughness and contamination during CCD manufacture | May 1, 1995 | Issued |
Array
(
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Array
(
[id] => 3589483
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[patent_title] => 'Method of fabricating self-aligned contact trench DMOS transistors'
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[pdf_file] => patents/05/567/05567634.pdf
[firstpage_image] =>[orig_patent_app_number] => 431765
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/431765 | Method of fabricating self-aligned contact trench DMOS transistors | Apr 30, 1995 | Issued |