Kevin L. Lee

Array ( [id] => 4169722 [patent_doc_number] => 06140229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Semiconductor apparatus and method of producing same' [patent_app_type] => 1 [patent_app_number] => 9/027149 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140229.pdf [firstpage_image] =>[orig_patent_app_number] => 027149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4236212 [patent_doc_number] => 06143660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Method of producing a contact between a metallizing layer and a semiconductor material' [patent_app_type] => 1 [patent_app_number] => 9/023720 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1591 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143660.pdf [firstpage_image] =>[orig_patent_app_number] => 023720 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3943120 [patent_doc_number] => 05976903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Method for manufacturing tunable laser' [patent_app_type] => 1 [patent_app_number] => 9/020711 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1449 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/976/05976903.pdf [firstpage_image] =>[orig_patent_app_number] => 020711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4214347 [patent_doc_number] => 06110775 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Process for fabrication of a dram cell having a stacked capacitor' [patent_app_type] => 1 [patent_app_number] => 9/018181 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 13861 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110775.pdf [firstpage_image] =>[orig_patent_app_number] => 018181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4190666 [patent_doc_number] => 06043101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'In-situ multiprobe retest method with recovery recognition' [patent_app_type] => 1 [patent_app_number] => 9/007982 [patent_app_country] => US [patent_app_date] => 1998-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043101.pdf [firstpage_image] =>[orig_patent_app_number] => 007982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4168818 [patent_doc_number] => 06140166 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Method for manufacturing semiconductor and method for manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/997910 [patent_app_country] => US [patent_app_date] => 1997-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 34 [patent_no_of_words] => 10141 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140166.pdf [firstpage_image] =>[orig_patent_app_number] => 997910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4029065 [patent_doc_number] => 05994159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Self-assemblying micro-mechanical device' [patent_app_type] => 1 [patent_app_number] => 8/997175 [patent_app_country] => US [patent_app_date] => 1997-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994159.pdf [firstpage_image] =>[orig_patent_app_number] => 997175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4069929 [patent_doc_number] => 05970313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Monitoring wafer temperature during thermal processing of wafers by measuring sheet resistance of a test wafer' [patent_app_type] => 1 [patent_app_number] => 8/994221 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2723 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970313.pdf [firstpage_image] =>[orig_patent_app_number] => 994221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4038868 [patent_doc_number] => 05942801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Borderless vias with HSQ gap filled metal patterns having high etching resistance' [patent_app_type] => 1 [patent_app_number] => 8/992430 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3832 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942801.pdf [firstpage_image] =>[orig_patent_app_number] => 992430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4196117 [patent_doc_number] => 06130442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Memory chip containing a non-volatile memory register for permanently storing information about the quality of the device and test method therefor' [patent_app_type] => 1 [patent_app_number] => 8/992607 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3935 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130442.pdf [firstpage_image] =>[orig_patent_app_number] => 992607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4080091 [patent_doc_number] => 05965908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Epitaxial wafer and manufacturing method thereof as well as light-emitting diode with enhanced luminance' [patent_app_type] => 1 [patent_app_number] => 8/991013 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2692 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/965/05965908.pdf [firstpage_image] =>[orig_patent_app_number] => 991013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4101998 [patent_doc_number] => 06051443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Method for assessing the effects of plasma treatments on wafers of semiconductor material' [patent_app_type] => 1 [patent_app_number] => 8/990617 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/051/06051443.pdf [firstpage_image] =>[orig_patent_app_number] => 990617 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4002754 [patent_doc_number] => 05986313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Semiconductor device comprising MISFETS and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/988776 [patent_app_country] => US [patent_app_date] => 1997-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 71 [patent_no_of_words] => 13475 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986313.pdf [firstpage_image] =>[orig_patent_app_number] => 988776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4154810 [patent_doc_number] => 06114183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Display apparatus using electroluminescence elements and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/987460 [patent_app_country] => US [patent_app_date] => 1997-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5183 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114183.pdf [firstpage_image] =>[orig_patent_app_number] => 987460 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4221835 [patent_doc_number] => 06010916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Method for improving semiconductor wafer processing' [patent_app_type] => 1 [patent_app_number] => 8/985553 [patent_app_country] => US [patent_app_date] => 1997-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1803 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/010/06010916.pdf [firstpage_image] =>[orig_patent_app_number] => 985553 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4106178 [patent_doc_number] => 06022750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Method for fabricating semiconductor interconnect having test structures for evaluating electrical characteristics of the interconnect' [patent_app_type] => 1 [patent_app_number] => 8/984247 [patent_app_country] => US [patent_app_date] => 1997-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 23 [patent_no_of_words] => 4253 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/022/06022750.pdf [firstpage_image] =>[orig_patent_app_number] => 984247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3967110 [patent_doc_number] => 05956596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Method of forming and cleaning a laser marking region at a round zone of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 8/980912 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3084 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956596.pdf [firstpage_image] =>[orig_patent_app_number] => 980912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3976063 [patent_doc_number] => 05937284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Method of making a semiconductor device having an SOI structure' [patent_app_type] => 1 [patent_app_number] => 8/979621 [patent_app_country] => US [patent_app_date] => 1997-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 90 [patent_no_of_words] => 7022 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937284.pdf [firstpage_image] =>[orig_patent_app_number] => 979621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4070299 [patent_doc_number] => 06069019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method of manufacturing transistor array' [patent_app_type] => 1 [patent_app_number] => 8/980083 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5848 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069019.pdf [firstpage_image] =>[orig_patent_app_number] => 980083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4214800 [patent_doc_number] => 06087190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Automatic test process with non-volatile result table store' [patent_app_type] => 1 [patent_app_number] => 8/973582 [patent_app_country] => US [patent_app_date] => 1997-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5896 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087190.pdf [firstpage_image] =>[orig_patent_app_number] => 973582 [rel_patent_id] =>[rel_patent_doc_number] =>)