Search

Kevin L. Lee

Examiner (ID: 14152, Phone: (571)272-4915 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753, 3407, 3727, 2899
Total Applications
3737
Issued Applications
3236
Pending Applications
189
Abandoned Applications
321

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4029124 [patent_doc_number] => 05994163 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method of manufacturing thin-film solar cells' [patent_app_type] => 1 [patent_app_number] => 8/817693 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1463 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994163.pdf [firstpage_image] =>[orig_patent_app_number] => 817693 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/817693
Method of manufacturing thin-film solar cells Apr 16, 1997 Issued
Array ( [id] => 4103132 [patent_doc_number] => 06049115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Scanning probe microscope, and semiconductor distortion sensor for use therein' [patent_app_type] => 1 [patent_app_number] => 8/842845 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 4304 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049115.pdf [firstpage_image] =>[orig_patent_app_number] => 842845 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/842845
Scanning probe microscope, and semiconductor distortion sensor for use therein Apr 16, 1997 Issued
Array ( [id] => 3937955 [patent_doc_number] => 05872024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Method for manufacturing a mechanical force sensing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/834129 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 31 [patent_no_of_words] => 10548 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872024.pdf [firstpage_image] =>[orig_patent_app_number] => 834129 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/834129
Method for manufacturing a mechanical force sensing semiconductor device Apr 13, 1997 Issued
Array ( [id] => 3964486 [patent_doc_number] => 05885847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Method of fabricating a compound semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/835957 [patent_app_country] => US [patent_app_date] => 1997-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1850 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/885/05885847.pdf [firstpage_image] =>[orig_patent_app_number] => 835957 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835957
Method of fabricating a compound semiconductor device Apr 10, 1997 Issued
Array ( [id] => 3785835 [patent_doc_number] => 05840595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Calibration of semiconductor pattern inspection device and a fabrication process of a semiconductor device using such an inspection device' [patent_app_type] => 1 [patent_app_number] => 8/834045 [patent_app_country] => US [patent_app_date] => 1997-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 29 [patent_no_of_words] => 7005 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/840/05840595.pdf [firstpage_image] =>[orig_patent_app_number] => 834045 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/834045
Calibration of semiconductor pattern inspection device and a fabrication process of a semiconductor device using such an inspection device Apr 10, 1997 Issued
Array ( [id] => 4218587 [patent_doc_number] => 06040199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Semiconductor test structure for estimating defects at isolation edge and test method using the same' [patent_app_type] => 1 [patent_app_number] => 8/835488 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5461 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040199.pdf [firstpage_image] =>[orig_patent_app_number] => 835488 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835488
Semiconductor test structure for estimating defects at isolation edge and test method using the same Apr 7, 1997 Issued
08/834961 METHOD FOR FORMING A HETEROJUNCTION SEMICONDUCTOR DEVICE HAVING A STRAINED LAYER Apr 6, 1997 Abandoned
Array ( [id] => 3791389 [patent_doc_number] => 05780328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Process for producing semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/835197 [patent_app_country] => US [patent_app_date] => 1997-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 9553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780328.pdf [firstpage_image] =>[orig_patent_app_number] => 835197 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835197
Process for producing semiconductor integrated circuit Apr 6, 1997 Issued
Array ( [id] => 3760680 [patent_doc_number] => 05851921 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Semiconductor device and method for forming the device using a dual layer, self-aligned silicide to enhance contact performance' [patent_app_type] => 1 [patent_app_number] => 8/832747 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/851/05851921.pdf [firstpage_image] =>[orig_patent_app_number] => 832747 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/832747
Semiconductor device and method for forming the device using a dual layer, self-aligned silicide to enhance contact performance Apr 3, 1997 Issued
Array ( [id] => 4221881 [patent_doc_number] => 06010919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Method for manufacturing semiconductor devices by use of dry etching' [patent_app_type] => 1 [patent_app_number] => 8/832231 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 6960 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/010/06010919.pdf [firstpage_image] =>[orig_patent_app_number] => 832231 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/832231
Method for manufacturing semiconductor devices by use of dry etching Apr 2, 1997 Issued
Array ( [id] => 4007178 [patent_doc_number] => 05888899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Method for copper doping of aluminum films' [patent_app_type] => 1 [patent_app_number] => 8/829885 [patent_app_country] => US [patent_app_date] => 1997-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2009 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888899.pdf [firstpage_image] =>[orig_patent_app_number] => 829885 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829885
Method for copper doping of aluminum films Apr 1, 1997 Issued
Array ( [id] => 4086068 [patent_doc_number] => 06017829 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Implanted conductor and methods of making' [patent_app_type] => 1 [patent_app_number] => 8/829851 [patent_app_country] => US [patent_app_date] => 1997-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4695 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/017/06017829.pdf [firstpage_image] =>[orig_patent_app_number] => 829851 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829851
Implanted conductor and methods of making Mar 31, 1997 Issued
Array ( [id] => 3950206 [patent_doc_number] => 05899703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Method for chip testing' [patent_app_type] => 1 [patent_app_number] => 8/827207 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1579 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/899/05899703.pdf [firstpage_image] =>[orig_patent_app_number] => 827207 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827207
Method for chip testing Mar 27, 1997 Issued
Array ( [id] => 3804387 [patent_doc_number] => 05830778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Method of manufacturing a charge transfer device' [patent_app_type] => 1 [patent_app_number] => 8/828337 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 4453 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/830/05830778.pdf [firstpage_image] =>[orig_patent_app_number] => 828337 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/828337
Method of manufacturing a charge transfer device Mar 27, 1997 Issued
Array ( [id] => 3943766 [patent_doc_number] => 05998234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Method of producing semiconductor device by dicing' [patent_app_type] => 1 [patent_app_number] => 8/825456 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 38 [patent_no_of_words] => 7075 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998234.pdf [firstpage_image] =>[orig_patent_app_number] => 825456 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825456
Method of producing semiconductor device by dicing Mar 27, 1997 Issued
Array ( [id] => 4069945 [patent_doc_number] => 05970314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Process for vapor phase epitaxy of compound semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/823237 [patent_app_country] => US [patent_app_date] => 1997-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5800 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970314.pdf [firstpage_image] =>[orig_patent_app_number] => 823237 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/823237
Process for vapor phase epitaxy of compound semiconductor Mar 23, 1997 Issued
Array ( [id] => 4070758 [patent_doc_number] => 05970365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Silicon wafer including amorphous silicon layer formed by PCVD and method of manufacturing wafer' [patent_app_type] => 1 [patent_app_number] => 8/826441 [patent_app_country] => US [patent_app_date] => 1997-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3498 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970365.pdf [firstpage_image] =>[orig_patent_app_number] => 826441 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/826441
Silicon wafer including amorphous silicon layer formed by PCVD and method of manufacturing wafer Mar 23, 1997 Issued
Array ( [id] => 4064287 [patent_doc_number] => 06008117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method of forming diffusion barriers encapsulating copper' [patent_app_type] => 1 [patent_app_number] => 8/820927 [patent_app_country] => US [patent_app_date] => 1997-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 8 [patent_no_of_words] => 2173 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008117.pdf [firstpage_image] =>[orig_patent_app_number] => 820927 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/820927
Method of forming diffusion barriers encapsulating copper Mar 18, 1997 Issued
Array ( [id] => 4011814 [patent_doc_number] => 05879963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method of making a sub-ground plane for a micromachined device' [patent_app_type] => 1 [patent_app_number] => 8/820248 [patent_app_country] => US [patent_app_date] => 1997-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1469 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/879/05879963.pdf [firstpage_image] =>[orig_patent_app_number] => 820248 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/820248
Method of making a sub-ground plane for a micromachined device Mar 17, 1997 Issued
Array ( [id] => 3742971 [patent_doc_number] => 05801097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Thermal annealing method employing activated nitrogen for forming nitride layers' [patent_app_type] => 1 [patent_app_number] => 8/814133 [patent_app_country] => US [patent_app_date] => 1997-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4597 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801097.pdf [firstpage_image] =>[orig_patent_app_number] => 814133 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/814133
Thermal annealing method employing activated nitrogen for forming nitride layers Mar 9, 1997 Issued
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