Kevin M. Johnson

Array ( [id] => 19670852 [patent_doc_number] => 12183622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor structure comprising an air chamber and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/652338 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 48 [patent_no_of_words] => 7982 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18587681 [patent_doc_number] => 20230269946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => STRUCTURE OF THREE-DIMENSIONAL MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/675391 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17995302 [patent_doc_number] => 20220361339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SEMICONDUCTOR PACKAGE FOR IMPROVING POWER INTEGRITY CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 17/591734 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18540888 [patent_doc_number] => 20230245999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => FORWARDED SUPPLY VOLTAGE FOR DYNAMIC VOLTAGE AND FREQUENCY SCALING WITH STACKED CHIP PACKAGING ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/588392 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17588392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18209961 [patent_doc_number] => 20230056222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/577196 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17900965 [patent_doc_number] => 20220310627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => Semiconductor Structure and Method for Forming Semiconductor Structure [patent_app_type] => utility [patent_app_number] => 17/647893 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647893 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19524036 [patent_doc_number] => 12125776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Method for forming semiconductor package and semiconductor package [patent_app_type] => utility [patent_app_number] => 17/562936 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 7114 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18473230 [patent_doc_number] => 20230207518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => SEMICONDUCTOR DEVICE WITH HOLLOW INTERCONNECTORS [patent_app_type] => utility [patent_app_number] => 17/560578 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17949279 [patent_doc_number] => 20220336298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/558803 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558803 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19721903 [patent_doc_number] => 12207461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Tier expansion offset [patent_app_type] => utility [patent_app_number] => 17/558001 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6724 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17993642 [patent_doc_number] => 20220359679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => BACKSIDE SOURCE/DRAIN CONTACTS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/557983 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17986021 [patent_doc_number] => 20220352058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING A SUPPORT SOLDER BALL [patent_app_type] => utility [patent_app_number] => 17/555583 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18456358 [patent_doc_number] => 20230197640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Seal Ring Structures [patent_app_type] => utility [patent_app_number] => 17/555995 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17477676 [patent_doc_number] => 20220085180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH T-SHAPED BURIED GATE ELECTRODE [patent_app_type] => utility [patent_app_number] => 17/534799 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18704872 [patent_doc_number] => 11791390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Semiconductor device having an air gap and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/530275 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 11387 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19720432 [patent_doc_number] => 12205977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Display module, display apparatus and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/524421 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12448 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17810942 [patent_doc_number] => 20220262777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/511178 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17583022 [patent_doc_number] => 20220139877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => ELECTRONIC DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/507271 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17507271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18325872 [patent_doc_number] => 20230124000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => ELECTRONIC PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/501953 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18570631 [patent_doc_number] => 20230260968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR DEVICE COMPRISING A STACK OF CHIPS, AND CHIPS FOR SUCH A STACK [patent_app_type] => utility [patent_app_number] => 18/031592 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18031592 [rel_patent_id] =>[rel_patent_doc_number] =>)