Search

Kevin M. Picardat

Examiner (ID: 9381, Phone: (571)272-1841 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2813, 2825, 1104, 2899, 2822, 1763, 1732
Total Applications
2640
Issued Applications
2463
Pending Applications
47
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9367349 [patent_doc_number] => 20140077222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'Gallium Nitride Devices with Aluminum Nitride Alloy Intermediate Layer' [patent_app_type] => utility [patent_app_number] => 14/084251 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7088 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084251 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/084251
Gallium nitride devices with aluminum nitride alloy intermediate layer Nov 18, 2013 Issued
Array ( [id] => 9406194 [patent_doc_number] => 20140097446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'Gallium Nitride Devices with Gallium Nitride Alloy Intermediate Layer' [patent_app_type] => utility [patent_app_number] => 14/084429 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7091 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084429 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/084429
Gallium nitride devices with gallium nitride alloy intermediate layer Nov 18, 2013 Issued
Array ( [id] => 9828106 [patent_doc_number] => 08937335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Gallium nitride devices with aluminum nitride intermediate layer' [patent_app_type] => utility [patent_app_number] => 14/083923 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083923 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/083923
Gallium nitride devices with aluminum nitride intermediate layer Nov 18, 2013 Issued
Array ( [id] => 11227609 [patent_doc_number] => 09455335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Techniques for ion implantation of non-planar field effect transistors' [patent_app_type] => utility [patent_app_number] => 14/080461 [patent_app_country] => US [patent_app_date] => 2013-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4595 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14080461 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/080461
Techniques for ion implantation of non-planar field effect transistors Nov 13, 2013 Issued
Array ( [id] => 9827745 [patent_doc_number] => 08936973 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-20 [patent_title] => 'Anodization of gate with laser vias and cuts' [patent_app_type] => utility [patent_app_number] => 14/080143 [patent_app_country] => US [patent_app_date] => 2013-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2554 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14080143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/080143
Anodization of gate with laser vias and cuts Nov 13, 2013 Issued
Array ( [id] => 9888875 [patent_doc_number] => 08975129 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-10 [patent_title] => 'Method of making a FinFET device' [patent_app_type] => utility [patent_app_number] => 14/079313 [patent_app_country] => US [patent_app_date] => 2013-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14079313 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/079313
Method of making a FinFET device Nov 12, 2013 Issued
Array ( [id] => 10010635 [patent_doc_number] => 09054163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Method for via plating with seed layer' [patent_app_type] => utility [patent_app_number] => 14/072890 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072890
Method for via plating with seed layer Nov 5, 2013 Issued
Array ( [id] => 9850140 [patent_doc_number] => 08951868 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-10 [patent_title] => 'Formation of functional gate structures with different critical dimensions using a replacement gate process' [patent_app_type] => utility [patent_app_number] => 14/071984 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 9122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/071984
Formation of functional gate structures with different critical dimensions using a replacement gate process Nov 4, 2013 Issued
Array ( [id] => 10241039 [patent_doc_number] => 20150126034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING TOPOGRAPHICAL FEATURES FOR DIRECTED SELF-ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/072149 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072149 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072149
Methods for fabricating integrated circuits including topographical features for directed self-assembly Nov 4, 2013 Issued
Array ( [id] => 9922742 [patent_doc_number] => 08980701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-17 [patent_title] => 'Method of forming semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/071672 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071672 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/071672
Method of forming semiconductor device Nov 4, 2013 Issued
Array ( [id] => 10241032 [patent_doc_number] => 20150126028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SURFACE MODIFICATION TO SELECTIVELY INHIBIT ETCHING' [patent_app_type] => utility [patent_app_number] => 14/071070 [patent_app_country] => US [patent_app_date] => 2013-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4964 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071070 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/071070
Methods for fabricating integrated circuits using surface modification to selectively inhibit etching Nov 3, 2013 Issued
Array ( [id] => 10892863 [patent_doc_number] => 08916475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-23 [patent_title] => 'Patterning method' [patent_app_type] => utility [patent_app_number] => 14/070262 [patent_app_country] => US [patent_app_date] => 2013-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4201 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14070262 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/070262
Patterning method Oct 31, 2013 Issued
Array ( [id] => 11014310 [patent_doc_number] => 20160211263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'NON-SILICON DEVICE HETEROLAYERS ON PATTERNED SILICON SUBSTRATE FOR CMOS BY COMBINATION OF SELECTIVE AND CONFORMAL EPITAXY' [patent_app_type] => utility [patent_app_number] => 14/915185 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 25249 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14915185 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/915185
Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy Sep 26, 2013 Issued
Array ( [id] => 10208870 [patent_doc_number] => 20150093860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'ORIENTATION-INDEPENDENT DEVICE CONFIGURATION AND ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/040552 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3991 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040552 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/040552
Orientation-independent device configuration and assembly Sep 26, 2013 Issued
Array ( [id] => 9691644 [patent_doc_number] => 08822237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Hole first hardmask definition' [patent_app_type] => utility [patent_app_number] => 14/031979 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3476 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031979 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031979
Hole first hardmask definition Sep 18, 2013 Issued
Array ( [id] => 9875197 [patent_doc_number] => 08962464 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-24 [patent_title] => 'Self-alignment for using two or more layers and methods of forming same' [patent_app_type] => utility [patent_app_number] => 14/030601 [patent_app_country] => US [patent_app_date] => 2013-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 91 [patent_no_of_words] => 9775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14030601 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/030601
Self-alignment for using two or more layers and methods of forming same Sep 17, 2013 Issued
Array ( [id] => 13288143 [patent_doc_number] => 10155244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Fluid deposition appartus and method [patent_app_type] => utility [patent_app_number] => 14/027368 [patent_app_country] => US [patent_app_date] => 2013-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14027368 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/027368
Fluid deposition appartus and method Sep 15, 2013 Issued
Array ( [id] => 10145271 [patent_doc_number] => 09178088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Apparatus and methods for fabricating solar cells' [patent_app_type] => utility [patent_app_number] => 14/025852 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14025852 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/025852
Apparatus and methods for fabricating solar cells Sep 12, 2013 Issued
Array ( [id] => 9850099 [patent_doc_number] => 08951825 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-10 [patent_title] => 'Solar cell texturing' [patent_app_type] => utility [patent_app_number] => 14/023423 [patent_app_country] => US [patent_app_date] => 2013-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 10063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14023423 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/023423
Solar cell texturing Sep 9, 2013 Issued
Array ( [id] => 9737807 [patent_doc_number] => 20140273525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Atomic Layer Deposition of Reduced-Leakage Post-Transition Metal Oxide Films' [patent_app_type] => utility [patent_app_number] => 14/019961 [patent_app_country] => US [patent_app_date] => 2013-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14019961 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/019961
Atomic Layer Deposition of Reduced-Leakage Post-Transition Metal Oxide Films Sep 5, 2013 Abandoned
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